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Mon, 29 Apr 2024 13:40:49 +0000 (UTC) Date: Mon, 29 Apr 2024 15:40:43 +0200 From: Borislav Petkov To: Yazen Ghannam Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, tony.luck@intel.com, x86@kernel.org, Avadhut.Naik@amd.com, John.Allen@amd.com Subject: Re: [PATCH v2 09/16] x86/mce: Unify AMD THR handler with MCA Polling Message-ID: <20240429134043.GPZi-jWzoVe3bJkyYX@fat_crate.local> References: <20240404151359.47970-1-yazen.ghannam@amd.com> <20240404151359.47970-10-yazen.ghannam@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20240404151359.47970-10-yazen.ghannam@amd.com> On Thu, Apr 04, 2024 at 10:13:52AM -0500, Yazen Ghannam wrote: > @@ -787,6 +793,8 @@ bool machine_check_poll(enum mcp_flags flags, mce_banks_t *b) > mce_log(&m); > > clear_it: > + vendor_handle_error(&m); Wait, whaaat? The normal polling happens periodically (each 5 mins) and you want to reset the thresholding blocks each 5 mins? And the code has there now: static void reset_block(struct threshold_block *block) { .. /* Reset threshold block after logging error. */ memset(&tr, 0, sizeof(tr)); tr.b = block; threshold_restart_bank(&tr); } but no error has been logged. Frankly, I don't see the point for this part: polling all banks on a thresholding interrupt makes sense. But this resetting from within the polling doesn't make any sense. Especially if that polling interval is user-controllable. Thx. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette