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charset=us-ascii Content-Disposition: inline In-Reply-To: <20240418125648.372526-3-Parthiban.Veerasooran@microchip.com> On Thu, Apr 18, 2024 at 06:26:38PM +0530, Parthiban Veerasooran wrote: > Implement register write operation according to the control communication > specified in the OPEN Alliance 10BASE-T1x MACPHY Serial Interface > document. Control write commands are used by the SPI host to write > registers within the MAC-PHY. Each control write commands are composed of > a 32 bits control command header followed by register write data. > > The MAC-PHY ignores the final 32 bits of data from the SPI host at the > end of the control write command. The write command and data is also > echoed from the MAC-PHY back to the SPI host to enable the SPI host to > identify which register write failed in the case of any bus errors. > Control write commands can write either a single register or multiple > consecutive registers. When multiple consecutive registers are written, > the address is automatically post-incremented by the MAC-PHY. Writing to > any unimplemented or undefined registers shall be ignored and yield no > effect. > > Signed-off-by: Parthiban Veerasooran .. > diff --git a/drivers/net/ethernet/oa_tc6.c b/drivers/net/ethernet/oa_tc6.c .. > +/** > + * oa_tc6_write_registers - function for writing multiple consecutive registers. > + * @tc6: oa_tc6 struct. > + * @address: address of the first register to be written in the MAC-PHY. > + * @value: values to be written from the starting register address @address. > + * @length: number of consecutive registers to be written from @address. > + * > + * Maximum of 128 consecutive registers can be written starting at @address. > + * > + * Returns 0 on success otherwise failed. Nit: I think you need a ':' after "Returns" (or "Return") in order for kernel-doc -Wall to recognise this as a return section. Likewise elsewhere in this patch(set). > + */ > +int oa_tc6_write_registers(struct oa_tc6 *tc6, u32 address, u32 value[], > + u8 length) > +{ ..