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d="scan'208";a="26231973" Received: from yilunxu-optiplex-7050.sh.intel.com (HELO localhost) ([10.239.159.165]) by fmviesa009.fm.intel.com with ESMTP; 29 Apr 2024 19:15:58 -0700 Date: Tue, 30 Apr 2024 10:10:29 +0800 From: Xu Yilun To: "Colberg, Peter" Cc: "Xu, Yilun" , "linux-fpga@vger.kernel.org" , "mdf@kernel.org" , "Wu, Hao" , "linux-kernel@vger.kernel.org" , "russ.weight@linux.dev" , "Pagani, Marco" , "Rix, Tom" , "matthew.gerlach@linux.intel.com" Subject: Re: [PATCH] fpga: dfl-pci: add PCI subdevice ID for Intel D5005 card Message-ID: References: <20240422230257.1959-1-peter.colberg@intel.com> <0081a4ba1304f37142e6b1714d022fd4e7c9821f.camel@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <0081a4ba1304f37142e6b1714d022fd4e7c9821f.camel@intel.com> On Fri, Apr 26, 2024 at 09:35:07PM +0000, Colberg, Peter wrote: > On Fri, 2024-04-26 at 12:10 +0800, Xu Yilun wrote: > > On Mon, Apr 22, 2024 at 07:02:57PM -0400, Peter Colberg wrote: > > > Add PCI subdevice ID for the Intel D5005 Stratix 10 FPGA card as > > > used with the Open FPGA Stack (OFS) FPGA Interface Manager (FIM). > > > > > > Unlike the Intel D5005 PAC FIM which exposed a separate PCI device ID, > > > the OFS FIM reuses the same device ID for all DFL-based FPGA cards > > > and differentiates on the subdevice ID. The subdevice ID values were > > > chosen as the numeric part of the FPGA card names in hexadecimal. > > > > > > Link: https://github.com/OFS/dfl-feature-id/pull/4 > > > > Any reason to put the Link in changelog. I didn't see it provide any > > extra info. > > The link is provided to point to the corresponding change in the dfl- > pci-ids registry, for someone who might not be aware of its existence. I suggest you don't put it in changelog, few people care about this downstream history. Put it below '---' if really necessary. I deleted this link when apply. Thanks, Yilun