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Date: Tue, 30 Apr 2024 09:58:53 +0200
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Subject: Re: [EXTERNAL] Re: [PATCH v3 2/5] spi: cadence: Add MRVL overlay
 bindings documentation for Cadence XSPI
To: Witold Sadowski <wsadowski@marvell.com>, Conor Dooley <conor@kernel.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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On 30/04/2024 00:59, Witold Sadowski wrote:
> 
>>
>> Confusing wording aside, using the same generic compatible for different
>> SoCs is what I trying to avoid. I don't mind there being a fallback
>> compatible that's generic, but I want to see specific compatibles here for
>> the individual SoCs.
>>
>> If you did actually mean that only the packaging is different between the
>> devices, then I don't think you need specific compatibles for each
>> different package, but you should have one for the SoC itself IMO.
> 
> We can have SoC A, B with common xSPI block, and both of them can share
> Same dtb node with compatible property "marvell,cn10k,xspi-nor" for
> example. I don't think it will be beneficial to have different compatible
> name for each different SoC, for example "marvell,t98,xspi-nor", if all
> other parts will be the same. Or am I not correct?

Please see writing bindings (or any presentation for DTS and bindings):
you are expected to have SoC specific compatibles for every block in the
SoC. There are many examples in recent bindings, so take a look there.

Best regards,
Krzysztof