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AJvYcCXyPlE4zSbQ07mFidsYC3kQP0kiJLcWKFHL7OJ5QD3QPaLMJpqVmm1N1Ke4eUQSQAC3cRCy3CSZdKBNTnTV4M+YbPWu/ICtuydBY/3S X-Gm-Message-State: AOJu0YxACHX9clhZIoFRHUZ5FUuAe6E5eCk7VvaHnITaldF0uzeNoy51 w0suwgQUr9u9VqaPzOaGvojr0HN8/AkBOXSn1mltcxJIVqx+/AANB0alwFbzZnB5y38VmCm5V54 GntWsrucWvGOw7VzW+ry0PNh8MJdKpODcvZe1jQ== X-Received: by 2002:a4a:d46:0:b0:5ac:c39b:3a7a with SMTP id 67-20020a4a0d46000000b005acc39b3a7amr16090427oob.1.1714475222500; Tue, 30 Apr 2024 04:07:02 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240429111537.2369227-1-peter.griffin@linaro.org> <20240429111537.2369227-4-peter.griffin@linaro.org> <8b3c9d34-15d5-4aac-b725-4cc25e469a58@kernel.org> In-Reply-To: <8b3c9d34-15d5-4aac-b725-4cc25e469a58@kernel.org> From: Peter Griffin Date: Tue, 30 Apr 2024 12:06:51 +0100 Message-ID: Subject: Re: [PATCH v4 3/4] arm64: dts: exynos: gs101: Add ufs and ufs-phy dt nodes To: Krzysztof Kozlowski Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, alim.akhtar@samsung.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, saravanak@google.com, willmcvicker@google.com, kernel-team@android.com Content-Type: text/plain; charset="UTF-8" Hi Krzysztof, On Mon, 29 Apr 2024 at 18:30, Krzysztof Kozlowski wrote: > > On 29/04/2024 13:15, Peter Griffin wrote: > > + ufs_0: ufs@14700000 { > > + compatible = "google,gs101-ufs"; > > + reg = <0x14700000 0x200>, > > + <0x14701100 0x200>, > > + <0x14780000 0xa000>, > > + <0x14600000 0x100>; > > + reg-names = "hci", "vs_hci", "unipro", "ufsp"; > > + interrupts = ; > > + clocks = <&cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_ACLK>, > > + <&cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_CLK_UNIPRO>, > > + <&cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_FMP_CLK>, > > + <&cmu_hsi2 CLK_GOUT_HSI2_QE_UFS_EMBD_HSI2_ACLK>, > > + <&cmu_hsi2 CLK_GOUT_HSI2_QE_UFS_EMBD_HSI2_PCLK>, > > + <&cmu_hsi2 CLK_GOUT_HSI2_SYSREG_HSI2_PCLK>; > > + clock-names = "core_clk", "sclk_unipro_main", "fmp", > > + "aclk", "pclk", "sysreg"; > > + freq-table-hz = <0 0>, <0 0>, <0 0>, <0 0>, <0 0>, <0 0>; > > + pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; > > + pinctrl-names = "default"; > > + phys = <&ufs_0_phy>; > > + phy-names = "ufs-phy"; > > + samsung,sysreg = <&sysreg_hsi2 0x710>; > > + status = "disabled"; > > + }; > > + > > + ufs_0_phy: phy@0x14704000 { > > Drop 0x from unit address. Thanks for the review, will fix. Peter