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bh=yJ1XxJMQ5M4P8jDVlymHQ15RBEASqivIdtexJWW2a98=; b=fisz1KdpdOh41mp9RFPSz1o7tW 7gW0hNiQhLW0rJoOyJ0O2qTek0DJKhbGZrwXJp15ugMa2otOdd+XbTgStjNXNW4P+dUvcZv3upBVn +GwP7FxkNS/9ytEzWezlQ1zSqMa12f1ggO0PWECAVjTsMZ5U8fkqxUejwVAnqvV+utss=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1s1oF9-00ELdZ-9N; Tue, 30 Apr 2024 16:14:03 +0200 Date: Tue, 30 Apr 2024 16:14:03 +0200 From: Andrew Lunn To: Parthiban.Veerasooran@microchip.com Cc: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, horms@kernel.org, saeedm@nvidia.com, anthony.l.nguyen@intel.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, corbet@lwn.net, linux-doc@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, devicetree@vger.kernel.org, Horatiu.Vultur@microchip.com, ruanjinjie@huawei.com, Steen.Hegelund@microchip.com, vladimir.oltean@nxp.com, UNGLinuxDriver@microchip.com, Thorsten.Kummermehr@microchip.com, Pier.Beruto@onsemi.com, Selvamani.Rajagopal@onsemi.com, Nicolas.Ferre@microchip.com, benjamin.bigler@bernformulastudent.ch, ramon.nordin.rodriguez@ferroamp.se Subject: Re: [PATCH net-next v4 13/12] net: lan865x: optional hardware reset Message-ID: References: <20240418125648.372526-1-Parthiban.Veerasooran@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: > In the spec, external RESET pin is mentioned as "if implemented", in my > understanding it is MAC-PHY vendors choice of implementing it where > Microchip is implemented it. Using this reset, can be a application > requirement/decision. It can be controlled from an external application > where it is not needed SPI to operate. Since it is optional, controlling the reset pin is clearly not something for the TC6 core. However, i doubt having an external application controlling the reset is a good idea. You don't want to reset during operation. So to me, this reset should be controlled by the driver. I tend to agree, that actually performing a reset is optional, but i would expect the driver to ensure the device is taken out of reset during probe, if the power on default of the board is to hold it in reset. Andrew