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Tue, 30 Apr 2024 08:48:45 -0700 Date: Tue, 30 Apr 2024 08:48:44 -0700 From: Nicolin Chen To: Jason Gunthorpe CC: , , , , , , , , , Subject: Re: [PATCH v6 4/6] iommu/arm-smmu-v3: Make __arm_smmu_cmdq_skip_err reusable Message-ID: References: <25150aec77edf5590bca81f4a418ef1ee7b21952.1714451595.git.nicolinc@nvidia.com> <20240430140600.GP941030@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20240430140600.GP941030@nvidia.com> X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF000044AC:EE_|IA1PR12MB8467:EE_ X-MS-Office365-Filtering-Correlation-Id: 99d2ee3f-5587-4f9c-f74f-08dc692d0dd3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|82310400014|36860700004|376005|1800799015; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?4TR8MlcGn+Q/USl73llWMwl2VHNAdlhdQnm0kDXETPckmzyRS1tDAhFjBQNB?= =?us-ascii?Q?sBg/WeqxvH3RGu5lvFPjx0COseNJitc62lnb4TpnrvB603+hjlaCxfnscski?= =?us-ascii?Q?qbTn/o72AeOCfkXVQ5xAj4uj9K1gDfAperwJbNwHcfewhIicdePnOjJ+lSAV?= =?us-ascii?Q?XppavcjH6x3gV8amtxoRhYzZyfdShL/30eq+BioVhNFJdJYxUnm7K8IDZ3fR?= =?us-ascii?Q?45Dwt1z+rwqsATr+JPHK1Uh9OvTVMk26glt9ttx7E235lej2OYgeAcAUffUc?= =?us-ascii?Q?N68KAJwGsxQV6+ntoERt3wfYahgr/vMUU/CBsKZrnX7dlX3Yux5QQSqUd6Wp?= =?us-ascii?Q?l0bwDKNKmuyLgJipYvTRf3lxJCZCEaOILLykedtqtmhNksRs1vZbnQEWpXUC?= =?us-ascii?Q?XFb+6T8FdCriKh/7KR9dNQPTJfcoh4jakLb/H8gLItbECsfxaHTpeXLoA9ba?= =?us-ascii?Q?Yx/4GBQv+cjy9wUhMjKojsIDvCdBNJqqmVKz6TbzslldgXTzcdQPucWkH6O4?= =?us-ascii?Q?OZcESBFqgSAVPZa9KofQ7xmVXrR7OOtU1D+wQMG6Tgqi8fnc1RKXm3JZ9OBV?= =?us-ascii?Q?K4Zpbrhixov2G0Xl1l9Q5cTjK1LAlqLUOOIAQ6aawyDUIP+F4YSzoXvc6L5c?= =?us-ascii?Q?z+Zw/dEsASfLjeFAA3G4Nk5vEmIcIPVmXMOb4AoZrfKjvzYHiR7KV1F1zSwU?= =?us-ascii?Q?oiDQW82jtiOgYE/kgFvwFLhiejFaM1e5mEFRgKYRBUtUqNzob5BPFHdKmjld?= =?us-ascii?Q?a72gaSmFFQt69hRTGSUG/kkRTynNGcpyosMkoGbCUqqot+FOAeczYfJe23dl?= =?us-ascii?Q?RoWQkCPYa3D/Vsnx59fYjzuNzAAy8YP+2lah/fFNcyeKpYqMzIrC3j+NAeuh?= =?us-ascii?Q?1quvUIyuENtm5W0Eoeg3lIfaqxjYZBJ0taq4DGx3Q73aNxFQF2ZhXu8wyS8e?= =?us-ascii?Q?BZzMI9ECDFuicC5acK8cBwfMRTckx906ZfQuBjH4YPmjWh3RGQfqzHmqdtGS?= =?us-ascii?Q?L9XKkPA+fSPWannVOyjCUy53frgjaElqLm0apCzwgcJpjlXw2cgcjuIc0JNj?= =?us-ascii?Q?LqGNVnVFg8jGjsGbikSSqefhY9WRTwaBBsk5lJiFtBOH2NbT64woeT/BNZnY?= =?us-ascii?Q?mPa1mS5H3aZy2nfdiOyoyCrQ2FSe2ngajZIKH4CR8rwObe6p/x0pTZbzQ6gf?= =?us-ascii?Q?jNORhwVlobEedZS5FiYGWH48A3c/F9An05rhch0YfscRTT8pKx+KKf3YJnXl?= =?us-ascii?Q?6JqkQwTQ2FcxyPf8A+29YM6IhP31+iOBleg335aoog5Y5TvtyFhf0QUS5zBW?= =?us-ascii?Q?Tn3BZZkWNbar2uVapppVB3vcTozXsdPrmtXOsGB+Z3D7eCUA7VJPyjbjDqq8?= =?us-ascii?Q?QYS9F7bKRiIXAT7peQhrQEpiedg5?= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230031)(82310400014)(36860700004)(376005)(1800799015);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Apr 2024 15:49:00.4176 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 99d2ee3f-5587-4f9c-f74f-08dc692d0dd3 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044AC.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8467 On Tue, Apr 30, 2024 at 11:06:00AM -0300, Jason Gunthorpe wrote: > On Mon, Apr 29, 2024 at 09:43:47PM -0700, Nicolin Chen wrote: > > Allow __arm_smmu_cmdq_skip_err function to be reused by NVIDIA Tegra241 > > CMDQV unit since it will use the same data structure for q. And include > > the CMDQ_QUIRK_SYNC_CS_NONE_ONLY quirk when inserting a CMD_SYNC. > > > > Signed-off-by: Nicolin Chen > > --- > > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 7 +++++-- > > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 ++ > > 2 files changed, 7 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > > index 538850059bdd..5111859347d5 100644 > > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > > @@ -379,8 +379,8 @@ static void arm_smmu_cmdq_build_sync_cmd(u64 *cmd, struct arm_smmu_device *smmu, > > arm_smmu_cmdq_build_cmd(cmd, &ent); > > } > > > > -static void __arm_smmu_cmdq_skip_err(struct arm_smmu_device *smmu, > > - struct arm_smmu_queue *q) > > +void __arm_smmu_cmdq_skip_err(struct arm_smmu_device *smmu, > > + struct arm_smmu_queue *q) > > { > > static const char * const cerror_str[] = { > > [CMDQ_ERR_CERROR_NONE_IDX] = "No error", > > @@ -428,6 +428,9 @@ static void __arm_smmu_cmdq_skip_err(struct arm_smmu_device *smmu, > > for (i = 0; i < ARRAY_SIZE(cmd); ++i) > > dev_err(smmu->dev, "\t0x%016llx\n", (unsigned long long)cmd[i]); > > > > + if (q->quirks & CMDQ_QUIRK_SYNC_CS_NONE_ONLY) > > + cmd_sync.sync.cs_none = true; > > This hunk should be in "iommu/arm-smmu-v3: Add CS_NONE quirk" ? Oh, yea. Will move it. Thanks! Nicolin