Received-SPF: pass (google.com: domain of linux-kernel+bounces-164320-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) client-ip=2604:1380:45d1:ec00::1;
Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates
 216.228.118.233 as permitted sender) receiver=protection.outlook.com;
 client-ip=216.228.118.233; helo=mail.nvidia.com; pr=C
Date: Tue, 30 Apr 2024 08:50:54 -0700
From: Nicolin Chen <nicolinc@nvidia.com>
To: Jason Gunthorpe <jgg@nvidia.com>
CC: <will@kernel.org>, <robin.murphy@arm.com>, <joro@8bytes.org>,
	<thierry.reding@gmail.com>, <vdumpa@nvidia.com>, <jonathanh@nvidia.com>,
	<linux-kernel@vger.kernel.org>, <iommu@lists.linux.dev>,
	<linux-arm-kernel@lists.infradead.org>, <linux-tegra@vger.kernel.org>
Subject: Re: [PATCH v6 3/6] iommu/arm-smmu-v3: Make arm_smmu_cmdq_init
 reusable
Message-ID: <ZjETXla+hTBR9E8E@Asurada-Nvidia>
References: <cover.1714451595.git.nicolinc@nvidia.com>
 <47a2ec844ec42694872d3c3b1a09f1b870712f78.1714451595.git.nicolinc@nvidia.com>
 <20240430142408.GR941030@nvidia.com>
Precedence: bulk
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Disposition: inline
In-Reply-To: <20240430142408.GR941030@nvidia.com>
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Apr 2024 15:51:16.1258
 (UTC)
X-MS-Exchange-CrossTenant-Network-Message-Id: 51c59e82-024c-4651-7989-08dc692d5eab
X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a
X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com]
X-MS-Exchange-CrossTenant-AuthSource:
	SN1PEPF0002BA4D.namprd03.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Anonymous
X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem
X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6566

On Tue, Apr 30, 2024 at 11:24:08AM -0300, Jason Gunthorpe wrote:
> On Mon, Apr 29, 2024 at 09:43:46PM -0700, Nicolin Chen wrote:
> > The CMDQV extension in NVIDIA Tegra241 SoC resues the arm_smmu_cmdq
> > structure while the queue location isn't same as smmu->cmdq.
> > 
> > Add a cmdq argument to arm_smmu_cmdq_init() function and shares its
> > define in the header for CMDQV driver to use.
> > 
> > Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
> > ---
> >  drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 6 +++---
> >  drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 3 +++
> >  2 files changed, 6 insertions(+), 3 deletions(-)
> 
> I would squash this patch and the next together:
> 
> iommu/arm-smm-v3: Make symbols public
> 
> The symbols arm_smmu_cmdq_init() and __arm_smmu_cmdq_skip_err() need
> to be used by the tegra241-cmdqv.c compilation unit in the next
> patch. Remove the static and put prototypes in the header.
> 
> But the code is fine
> 
> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>

Then, arm_smmu_init_one_queue could be moved to this patch too.

Thanks
Nicolin