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This is due > to a change in the PStateDef MSR layout in AMD Family 1Ah+. > > [ dhananjay: commit log, tested on 4th and 5th Gen AMD EPYC system ] > > Signed-off-by: Ananth Narayan > Signed-off-by: Dhananjay Ugwekar Reviewed-by: Mario Limonciello > --- > tools/power/cpupower/utils/helpers/amd.c | 26 +++++++++++++++++++++--- > 1 file changed, 23 insertions(+), 3 deletions(-) > > diff --git a/tools/power/cpupower/utils/helpers/amd.c b/tools/power/cpupower/utils/helpers/amd.c > index c519cc89c97f..0a56e22240fc 100644 > --- a/tools/power/cpupower/utils/helpers/amd.c > +++ b/tools/power/cpupower/utils/helpers/amd.c > @@ -41,6 +41,16 @@ union core_pstate { > unsigned res1:31; > unsigned en:1; > } pstatedef; > + /* since fam 1Ah: */ > + struct { > + unsigned fid:12; > + unsigned res1:2; > + unsigned vid:8; > + unsigned iddval:8; > + unsigned idddiv:2; > + unsigned res2:31; > + unsigned en:1; > + } pstatedef2; > unsigned long long val; > }; > > @@ -48,6 +58,10 @@ static int get_did(union core_pstate pstate) > { > int t; > > + /* Fam 1Ah onward do not use did */ > + if (cpupower_cpu_info.family >= 0x1A) > + return 0; > + > if (cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_PSTATEDEF) > t = pstate.pstatedef.did; > else if (cpupower_cpu_info.family == 0x12) > @@ -61,12 +75,18 @@ static int get_did(union core_pstate pstate) > static int get_cof(union core_pstate pstate) > { > int t; > - int fid, did, cof; > + int fid, did, cof = 0; > > did = get_did(pstate); > if (cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_PSTATEDEF) { > - fid = pstate.pstatedef.fid; > - cof = 200 * fid / did; > + if (cpupower_cpu_info.family >= 0x1A) { > + fid = pstate.pstatedef2.fid; > + if (fid > 0x0f) > + cof = (fid * 5); > + } else { > + fid = pstate.pstatedef.fid; > + cof = 200 * fid / did; > + } > } else { > t = 0x10; > fid = pstate.pstate.fid;