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Wed, 1 May 2024 08:32:28 GMT Received: from hu-skakitap-hyd.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 1 May 2024 01:32:23 -0700 From: Satya Priya Kakitapalli Subject: [PATCH v3 0/2] Add DT support for video clock controller on SM8150 Date: Wed, 1 May 2024 14:02:17 +0530 Message-ID: <20240501-videocc-sm8150-dt-node-v3-0-2c4bd9ef48bd@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIABL+MWYC/3XNQQ6CMBCF4auQrq1ppwjVlfcwLmA6yCygSrHRE O5uISbGBcv/JfPNJAINTEGcskkMFDmw71OYXSawrfobSXapBSjIlVFWRnbkEWXorD4o6UbZe0e yaHRh6vwITYkiHd8Havi1wpdr6pbD6If3+ifqZf2S2myRUUslK7KEBi0AwvnxZOQe9+g7saARf lCu9CYECTK1LdFB5dyx+Ifmef4ANBUAogcBAAA= To: Bjorn Andersson , Konrad Dybcio , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Michael Turquette , "Stephen Boyd" CC: Dmitry Baryshkov , Ajit Pandey , Imran Shaik , "Taniya Das" , Jagadeesh Kona , , , , , "Satya Priya Kakitapalli" X-Mailer: b4 0.12.4 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: OroXDFL1kL9S_q2kNk2a2Sf4E2WmxpzI X-Proofpoint-ORIG-GUID: OroXDFL1kL9S_q2kNk2a2Sf4E2WmxpzI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-01_08,2024-04-30_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxlogscore=708 bulkscore=0 adultscore=0 priorityscore=1501 impostorscore=0 phishscore=0 mlxscore=0 lowpriorityscore=0 spamscore=0 clxscore=1015 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2404010003 definitions=main-2405010059 Signed-off-by: Satya Priya Kakitapalli --- Changes in v3: - Adding the required-opps property back, which was removed in v2. - This is needed because the lowest power state for MMCX on sm8150 platform is retention, but we want to enable the power domain in low_svs not retention. - Link to v2: https://lore.kernel.org/r/20240401-videocc-sm8150-dt-node-v2-0-3b87cd2add96@quicinc.com Changes in v2: - As per Dmitry's comments, there is no need to update to index based lookup for already existing drivers, hence keeping clock-names property. - Updated the videocc bindings to add AHB clock for the sm8150 platform. - Link to v1: https://lore.kernel.org/r/20240313-videocc-sm8150-dt-node-v1-0-ae8ec3c822c2@quicinc.com --- Satya Priya Kakitapalli (2): dt-bindings: clock: qcom: Add AHB clock for SM8150 arm64: dts: qcom: sm8150: Add video clock controller node .../devicetree/bindings/clock/qcom,videocc.yaml | 17 ++++++++++++++++- arch/arm64/boot/dts/qcom/sa8155p.dtsi | 4 ++++ arch/arm64/boot/dts/qcom/sm8150.dtsi | 14 ++++++++++++++ 3 files changed, 34 insertions(+), 1 deletion(-) --- base-commit: 8ffc8b1bbd505e27e2c8439d326b6059c906c9dd change-id: 20240308-videocc-sm8150-dt-node-6f163b492f7c Best regards, -- Satya Priya Kakitapalli