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Wed, 01 May 2024 10:06:21 -0700 (PDT) Date: Wed, 1 May 2024 10:06:18 -0700 From: Charlie Jenkins To: Conor Dooley Cc: Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Guo Ren , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Conor Dooley , Evan Green , =?iso-8859-1?Q?Cl=E9ment_L=E9ger?= , Jonathan Corbet , Shuah Khan , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Palmer Dabbelt , linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: Re: [PATCH v4 05/16] riscv: Extend cpufeature.c to detect vendor extensions Message-ID: References: <20240426-dev-charlie-support_thead_vector_6_9-v4-0-b692f3c516ec@rivosinc.com> <20240426-dev-charlie-support_thead_vector_6_9-v4-5-b692f3c516ec@rivosinc.com> <20240501-pelican-throwaway-da84be7dac30@spud> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240501-pelican-throwaway-da84be7dac30@spud> On Wed, May 01, 2024 at 12:19:34PM +0100, Conor Dooley wrote: > On Fri, Apr 26, 2024 at 02:29:19PM -0700, Charlie Jenkins wrote: > > @@ -353,6 +336,10 @@ static void __init riscv_parse_isa_string(unsigned long *this_hwcap, struct risc > > bool ext_long = false, ext_err = false; > > > > switch (*ext) { > > + case 'x': > > + case 'X': > > + pr_warn_once("Vendor extensions are ignored in riscv,isa. Use riscv,isa-extensions instead."); > > + continue; > > Yeah, so this is not right - you need to find the end of the extension > before containing - for example if I had a system with > rv64imafdcxconorkwe, you get something like: > [ 0.000000] CPU with hartid=0 is not available > [ 0.000000] Falling back to deprecated "riscv,isa" > [ 0.000000] Vendor extensions are ignored in riscv,isa. Use riscv,isa-extensions instead. > [ 0.000000] riscv: base ISA extensions acdefikmnorw > [ 0.000000] riscv: ELF capabilities acdfim > > kwe are all pretty safe letters, but suppose one was a v.. > I think you can just yoink the code from the s/z case: Oh right, I forgot about that. > > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c > index 20bc9ba6b7a2..4daedba7961f 100644 > --- a/arch/riscv/kernel/cpufeature.c > +++ b/arch/riscv/kernel/cpufeature.c > @@ -338,8 +338,19 @@ static void __init riscv_parse_isa_string(unsigned long *this_hwcap, struct risc > switch (*ext) { > case 'x': > case 'X': > - pr_warn_once("Vendor extensions are ignored in riscv,isa. Use riscv,isa-extensions instead."); > - continue; > + if (acpi_disabled) > + pr_warn_once("Vendor extensions are ignored in riscv,isa. Use riscv,isa-extensions instead."); > + /* > + * To skip an extension, we find its end. > + * As multi-letter extensions must be split from other multi-letter > + * extensions with an "_", the end of a multi-letter extension will > + * either be the null character or the "_" at the start of the next > + * multi-letter extension. > + */ > + for (; *isa && *isa != '_'; ++isa) > + ; > + ext_err = true; > + break; > case 's': > /* > * Workaround for invalid single-letter 's' & 'u' (QEMU). > > You'll note that I made the dt property error dt only, this function > gets called for ACPI too. I think the skip is pretty safe there though > at the moment, we've not established any meanings yet for vendor stuff > on ACPI. > I think breaking is probably better than using continue - we get the _ > skip from outside the switch statement out of that. And ye, I am lazy > so I kept it as a for loop. Awesome, thanks! - Charlie > > Cheers, > Conor.