Received-SPF: pass (google.com: domain of linux-kernel+bounces-165685-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) client-ip=2604:1380:45d1:ec00::1;
Message-ID: <3b1b1b23-b633-4085-825b-2867f665abc7@intel.com>
Date: Wed, 1 May 2024 11:22:19 -0700
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v19 101/130] KVM: TDX: handle ept violation/misconfig exit
To: Isaku Yamahata <isaku.yamahata@intel.com>
CC: Chao Gao <chao.gao@intel.com>, <kvm@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <isaku.yamahata@gmail.com>, Paolo Bonzini
	<pbonzini@redhat.com>, <erdemaktas@google.com>, Sean Christopherson
	<seanjc@google.com>, Sagi Shahar <sagis@google.com>, Kai Huang
	<kai.huang@intel.com>, <chen.bo@intel.com>, <hang.yuan@intel.com>,
	<tina.zhang@intel.com>, <isaku.yamahata@linux.intel.com>
References: <cover.1708933498.git.isaku.yamahata@intel.com>
 <f05b978021522d70a259472337e0b53658d47636.1708933498.git.isaku.yamahata@intel.com>
 <Zgoz0sizgEZhnQ98@chao-email>
 <20240403184216.GJ2444378@ls.amr.corp.intel.com>
 <43cbaf90-7af3-4742-97b7-2ea587b16174@intel.com>
 <20240501155620.GA13783@ls.amr.corp.intel.com>
 <399cec29-ddf4-4dd5-a34b-ffec72cbfa26@intel.com>
 <20240501181921.GB13783@ls.amr.corp.intel.com>
Content-Language: en-US
From: Reinette Chatre <reinette.chatre@intel.com>
In-Reply-To: <20240501181921.GB13783@ls.amr.corp.intel.com>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: 7bit
Precedence: bulk
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?Mm9NTmZoVVlLN2Mzc1B2VFNyYzJ3U1l6OThDc25ZL1NJdHJ1c21jTXdBdkdr?=
 =?utf-8?B?V0ZXWllNbVNYeFBZbkFXeFpFOGRpT3BVQTNqM1lVTWFsRUNqUG1pZ1o0ckxa?=
 =?utf-8?B?UVVvakxXMWg1d3MzbHNLMEhWdmJzcS95dGdDSnRKMWw0Q0t4QmptUFBnbEpH?=
 =?utf-8?B?RGJ3TU9oRjlINDM4SDRLTktIQXBKSmVqd3o0V0VUdTVZcGFQWHV3dkF0cERR?=
 =?utf-8?B?dEEzalRVSHBSbEphNmo0Ymd1aEJCNnZ3U1RrL054c3pISU1OWkdhemtMTi9q?=
 =?utf-8?B?WUhFaTJOSHlnSHpxeDZqN3krdDRxMTNsYXBpSU1wVnRSMmRuaVFmalRsRUVq?=
 =?utf-8?B?ek1tMmNGNkoxWmRkOXMyajRvSFJsTW1iaXJJSVJSdzZGQzlxcDRpcFRCdm8x?=
 =?utf-8?B?Vk9vNVpORjBTQnpGdkV2bGpYcm00YVA0dVZFSGo3SGtDWVR4WS9hZ0lRbktp?=
 =?utf-8?B?ZGZyOVFJR3NSVzA0ODlyK0w2SGZCb0c0L0lEZFZVc2FCSklsbDdxN3VNa0tm?=
 =?utf-8?B?VkNZYlBoWGtUbkdIVENhQm9wVldXdWVRNmVrZnRBUzBZOEJjb0drZVFpR0hx?=
 =?utf-8?B?dSs1Z3c2emhGZm1FMFhyYkZyMEt2ZGZ2TkFVdS84aHNEQ25UNC9LUlFuWkY3?=
 =?utf-8?B?ZE9rdXhweEhzZXRacy8yRktHd0hWK2IvcEZWUVpBcHF6M0swWndTVkxIdWEr?=
 =?utf-8?B?cUdJQjdDQ3NPUE5xZ1lISXVzMVlQOXhZVjIxNXBmNjR1NmIyRHA1MUppUFUw?=
 =?utf-8?B?WVZLenhuYm1CakNrd3RHQmVOa0w2NE9CSHhhd0ZzOGh6VUNaM0QwaXVOellM?=
 =?utf-8?B?V3JZOEdxdVdXdWw2c2xLalR3OVlSck1JT1RRZ0tOYVNqeDUyS0ZFbVdmMTg0?=
 =?utf-8?B?Q1MrNjBDQ3BJb2x3NmRKSjM2ZnFrRDV6RXJoajBHRGN1YUhRc3c0SmVVbmh5?=
 =?utf-8?B?Z3pQMjA2V1hmM2FEOHZVNm03R0w2Y1JEUm1FQTJvbkMxL1BtM1IvYnc2bkJ0?=
 =?utf-8?B?bHVGUncwTTFJV3JOb2ZOc0RuWHh4TnB5UEdwTFVDcG5CcWVIL01ZQ3FqUUdh?=
 =?utf-8?B?Vk9EcFdNR0JtTXpRTk1qT01rTG9VK0ovc2RqbCtuYTd4NkcxYmRNdlp3cjFS?=
 =?utf-8?B?Z0kxV2RWOUFmVjJ0b3NyZHVIRFJqMXRmcDRtaGl0bkZhR2lIcDFHY1JMMWdT?=
 =?utf-8?B?RkswNk14cHFhV0xQZlNIckwvT1M1Um1JK1ZKMUdXcGgrSjQ0Mm9SKzRJM05H?=
 =?utf-8?B?WEwrcFkzWEdqVGJia00zd2c4OVhoclRlQ3M5ZE1DOGZLbzZ4WjR5VkttSkVQ?=
 =?utf-8?B?c0owOFdpZ0xyRnk4RWdmcmwwc1NyWjJWOG1nTFI0dExaVk5CR2xPeFdQSkpU?=
 =?utf-8?B?bWx5c2lFVHFuNVZtZGZUODAwNWtJcWRxTTlJcVNzVkRKQ2trVjZma0ZjMGw2?=
 =?utf-8?B?NnhMd2I3dGdhSjJZWHF4eU1nRE01djlLU3RFYjgxL2ttWWR0VnY3ZGluMG1H?=
 =?utf-8?B?b1VMSVhUZSs4ZCtQRERyMVpvQm8wZ0M0R2taNXg4RVgxRlhoS0NjOU94TlJt?=
 =?utf-8?B?blhVNlp2L1lkVGZRM3ViOENDN2p6c3ppTFJjelRsdVQvUXhKdWdCbkRxNjhq?=
 =?utf-8?B?Mzk4ckJWRG95ZUp0Qmpka0o1Q3ppQTBhY1g1UXJjT1l4RkUxOUZ0MFgvMHhM?=
 =?utf-8?B?YzNPZ0dwenJWbWQ5MnArVUpyRnA3U3VpbWc4UDFxdVdhYWRqZE5iUlZRM3BL?=
 =?utf-8?B?NFNIa2JyV2hrQk5NSC9FWitGaTZBQURIS2dBcEgxQU1ncEdCWWNHSmlTek5V?=
 =?utf-8?B?VmFuekxSaGFWRjV6RC9TUzZqcEV5SFRxOWJGOTBkM09Rc2FhWDlZc1RKdCtL?=
 =?utf-8?B?dS9takM1b3FBRFlud2hRQzhKaDlITk0yUVdidEpVdEErd1FiMWttUDdpWDJk?=
 =?utf-8?B?ZWlGY2kzckgyU0ErTmp5b2Y1bUZwME5sZ0tNVHgzTlJsQ2JJOXRCSUhtQXRE?=
 =?utf-8?B?LzIySDZLOWNIaVZNWU5SNnlUZTJCQThQVUV6VThvM2pQcDBLM1p3UkczR0Z6?=
 =?utf-8?B?L2ZVRDBrTGMxZ3hUd0lLWitxcGNPenBhMVU1c28wRGtLcnlORUVqejVnVXFV?=
 =?utf-8?B?MWFscXBzZGU3MlBHMWlEcUFRNm5YR290cnVlM2dwUVhwa0x2eVVKMzM4Q0d6?=
 =?utf-8?B?QkE9PQ==?=
X-MS-Exchange-CrossTenant-Network-Message-Id: 478f9a66-4208-42a4-e831-08dc6a0ba4e1
X-MS-Exchange-CrossTenant-AuthSource: SJ2PR11MB7573.namprd11.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 May 2024 18:22:22.4781
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: 1XK2eAQRyG53OwEH8LbKqyh7tzNiMUZ/I5PFmxkMY0xw+vS8VFqXqqdWzt8OzMMyXwyNuyeLXC1BDkHgGk740b/5l+/gMQZEJYT2em9IVtE=
X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR11MB8009
X-OriginatorOrg: intel.com

Hi Isaku,

On 5/1/2024 11:19 AM, Isaku Yamahata wrote:
> On Wed, May 01, 2024 at 09:54:07AM -0700,
> Reinette Chatre <reinette.chatre@intel.com> wrote:
> 
>> Hi Isaku,
>>
>> On 5/1/2024 8:56 AM, Isaku Yamahata wrote:
>>> On Tue, Apr 30, 2024 at 01:47:07PM -0700,
>>> Reinette Chatre <reinette.chatre@intel.com> wrote:
>>>> On 4/3/2024 11:42 AM, Isaku Yamahata wrote:
>>>>> On Mon, Apr 01, 2024 at 12:10:58PM +0800,
>>>>> Chao Gao <chao.gao@intel.com> wrote:
>>>>>
>>>>>>> +static int tdx_handle_ept_violation(struct kvm_vcpu *vcpu)
>>>>>>> +{
>>>>>>> +	unsigned long exit_qual;
>>>>>>> +
>>>>>>> +	if (kvm_is_private_gpa(vcpu->kvm, tdexit_gpa(vcpu))) {
>>>>>>> +		/*
>>>>>>> +		 * Always treat SEPT violations as write faults.  Ignore the
>>>>>>> +		 * EXIT_QUALIFICATION reported by TDX-SEAM for SEPT violations.
>>>>>>> +		 * TD private pages are always RWX in the SEPT tables,
>>>>>>> +		 * i.e. they're always mapped writable.  Just as importantly,
>>>>>>> +		 * treating SEPT violations as write faults is necessary to
>>>>>>> +		 * avoid COW allocations, which will cause TDAUGPAGE failures
>>>>>>> +		 * due to aliasing a single HPA to multiple GPAs.
>>>>>>> +		 */
>>>>>>> +#define TDX_SEPT_VIOLATION_EXIT_QUAL	EPT_VIOLATION_ACC_WRITE
>>>>>>> +		exit_qual = TDX_SEPT_VIOLATION_EXIT_QUAL;
>>>>>>> +	} else {
>>>>>>> +		exit_qual = tdexit_exit_qual(vcpu);
>>>>>>> +		if (exit_qual & EPT_VIOLATION_ACC_INSTR) {
>>>>>>
>>>>>> Unless the CPU has a bug, instruction fetch in TD from shared memory causes a
>>>>>> #PF. I think you can add a comment for this.
>>>>>
>>>>> Yes.
>>>>>
>>>>>
>>>>>> Maybe KVM_BUG_ON() is more appropriate as it signifies a potential bug.
>>>>>
>>>>> Bug of what component? CPU. If so, I think KVM_EXIT_INTERNAL_ERROR +
>>>>> KVM_INTERNAL_ERROR_UNEXPECTED_EXIT_REASON is more appropriate.
>>>>>
>>>>
>>>> Is below what you have in mind?
>>>
>>> Yes. data[0] should be the raw value of exit reason if possible.
>>> data[2] should be exit_qual.  Hmm, I don't find document on data[] for
>>
>> Did you perhaps intend to write "data[1] should be exit_qual" or would you
>> like to see ndata = 3? I followed existing usages, for example [1] and [2],
>> that have ndata = 2 with "data[1] = vcpu->arch.last_vmentry_cpu".
>>
>>> KVM_INTERNAL_ERROR_UNEXPECTED_EXIT_REASON.
>>> Qemu doesn't assumt ndata = 2. Just report all data within ndata.
>>
>> I am not sure I interpreted your response correctly so I share one possible
>> snippet below as I interpret it. Could you please check where I misinterpreted
>> you? I could also make ndata = 3 to break the existing custom and add
>> "data[2] = vcpu->arch.last_vmentry_cpu" to match existing pattern. What do you
>> think?
>>
> Sorry, I wasn't clear enough. I meant
>   ndata = 3;
>   data[0] = exit_reason.full;
>   data[1] = vcpu->arch.last_vmentry_cpu;
>   data[2] = exit_qual;
> 
> Because I hesitate to change the meaning of data[1] from other usage, I
> appended exit_qual as data[2].

I understand it now. Thank you very much Isaku.

Reinette