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Message-ID: <588fb903-e5ca-43af-9258-c14aaab6c732@bootlin.com>
Date: Thu, 2 May 2024 09:47:38 +0200
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Subject: Re: [PATCH RFC v2 0/4] clk: thead: Add support for TH1520 AP_SUBSYS
 clock controller
To: Drew Fustini <dfustini@tenstorrent.com>,
 Jisheng Zhang <jszhang@kernel.org>, Guo Ren <guoren@kernel.org>,
 Fu Wei <wefu@redhat.com>, Yangtao Li <frank.li@vivo.com>,
 Emil Renner Berthing <emil.renner.berthing@canonical.com>,
 Michael Turquette <mturquette@baylibre.com>, Stephen Boyd
 <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
 Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley
 <conor+dt@kernel.org>, Paul Walmsley <paul.walmsley@sifive.com>,
 Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>
Cc: linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org,
 devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
 Miquel Raynal <miquel.raynal@bootlin.com>,
 Thomas Petazzoni <thomas.petazzoni@bootlin.com>
References: <20240426-th1520-clk-v2-v2-0-96b829e6fcee@tenstorrent.com>
Content-Language: en-US
From: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
In-Reply-To: <20240426-th1520-clk-v2-v2-0-96b829e6fcee@tenstorrent.com>
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On 4/27/24 2:10 AM, Drew Fustini wrote:
> This series adds support for the AP sub-system clock controller in the
> T-Head TH1520 [1]. Yangtao Li originally submitted this series in May
> 2023 [2]. Jisheng made additional improvements and then passed on the
> work in progress to me.
> 
> Changes I made from the original series:
>   - corrected the npu_clk enable bit
>   - deduplicated CLK_NPU and CLK_NPU_AXI number in header
>   - fixed c910_i0_clk reg typo
>   - fixed checkpatch and dt_binding_check warnings
>   - rebased on v6.9-rc5
>   - revised commit descriptions
> 
> Changes since my RFC v1 [4]:
>   - squash the header file patch into the DT schema patch
>   - describe the changes I made to original series in the cover letter
>     instead of the individual patches
>   - fix my typo in my email address
> 
> TODO:
> I am again marking this as an RFC because there is feedback from v1 that
> I have not yet addressed. I am posting what I currently have as other
> patch series like the TH1520 I2C driver [4] could use the clk driver.
> 
> Emil commented that the input predivider is not handled correctly in
> ccu_mdiv_recalc_rate(). The PLL multiplies the input frequency and
> outputs "Foutvco". This is followed by a post divider to produce
> "Foutpostdiv". However, some clocks derive directly from the "Foutvco"
> Emil suggested this should really be modeled as two different clocks.
> 
> Emil aslo suggested that the rest of the clocks in this driver seem to
> be generic gate and mux implementations that should probably be replaced
> with devm_clk_hw_register_gate*() and devm_clk_hw_register_mux*().
> 
> I'll look to address the above issues in the next revision.
> 
> Thank you,
> Drew
> 
> [1] https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf
> [2] https://lore.kernel.org/linux-riscv/20230515054402.27633-1-frank.li@vivo.com/
> [3] https://lore.kernel.org/lkml/20240110-clk-th1520-v1-0-8b0682567984@tenstorrent.com/
> [4] https://lore.kernel.org/linux-riscv/20240425082138.374445-1-thomas.bonnefille@bootlin.com/

Thank you ! It works on the Beagle-V Ahead :)

Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>