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Thu, 2 May 2024 07:31:18 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.11.0-alpha0-416-g2c1796742e-fm-20240424.001-g2c179674 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <31ed4654-094a-4e1e-9182-973b43ae3464@app.fastmail.com> In-Reply-To: <23A87C03-EB55-49A1-BB55-B6136117F0B6@gmail.com> References: <23A87C03-EB55-49A1-BB55-B6136117F0B6@gmail.com> Date: Thu, 02 May 2024 13:30:58 +0200 From: "Arnd Bergmann" To: "D. Jeff Dionne" , "Paul E. McKenney" Cc: "John Paul Adrian Glaubitz" , Linux-Arch , linux-kernel@vger.kernel.org, "Marco Elver" , "Andrew Morton" , "Thomas Gleixner" , "Peter Zijlstra" , "Doug Anderson" , "Petr Mladek" , "Linus Torvalds" , kernel-team@meta.com, "Andi Shyti" , "Palmer Dabbelt" , "Masami Hiramatsu" , linux-sh@vger.kernel.org Subject: Re: [PATCH v2 cmpxchg 12/13] sh: Emulate one-byte cmpxchg Content-Type: text/plain On Thu, May 2, 2024, at 07:42, D. Jeff Dionne wrote: > On May 2, 2024, at 14:07, Paul E. McKenney wrote: > >> That would be 8-bit xchg() rather than 8-byte cmpxchg(), correct? >> >> Or am I missing something subtle here that makes sh also support one-byte >> (8-bit) cmpxchg()? > > The native SH atomic operation is test and set TAS.B. J2 adds a > compare and swap CAS.L instruction, carefully chosen for patent free > prior art (s360, IIRC). > > The (relatively expensive) encoding space we allocated for CAS.L does > not contain size bits. > > Not all SH4 patents had expired when J2 was under development, but now > have (watch this space). Not sure (me myself) if there are more atomic > operations in sh4. SH4A supports MIPS R4000 style LL/SC instructions, but it looks like the older SH4 does not. Arnd