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h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=N0Z8OZIck6+4ADleMnXW2At4y7Y90h5hz/oh8kjLP9uVW/1MNZCM8x7JfRrxvYEcu 3rar8vu6/BQslRhR7U5RIzSr1OI2sT6zwtuSzPD2TibOEk1CeeP6QLQvPuXforw2L2 WHJSgkfCRNz7DACLRtYDTX3QR5weW7UfcEu8hngaX0HOpjGz+1hy6WLDBLi2W/P7Kt TuMANBnMyxlE92LGT4KisLi1iMaqbvXf4ox4xWHM+NoxF6h1h39QslBgL9TjdN0PlG 8irY6FrtG7H4/kzZx8BQ8ZXOwCDkUnyvrn2ikow8YWzr2l7gZLpbl1ObQAx8MnVIa3 urenvoWD5uyBA== Received: from IcarusMOD.eternityproject.eu (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madrid.collaboradmins.com (Postfix) with ESMTPSA id D0C233782108; Thu, 2 May 2024 11:56:33 +0000 (UTC) From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Cc: robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, shawn.sung@mediatek.com, yu-chang.lee@mediatek.com, ck.hu@mediatek.com, jitao.shi@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, wenst@chromium.org, kernel@collabora.com Subject: [PATCH v3 2/3] dt-bindings: arm: mediatek: mmsys: Add OF graph support for board path Date: Thu, 2 May 2024 13:56:21 +0200 Message-ID: <20240502115622.248456-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240502115622.248456-1-angelogioacchino.delregno@collabora.com> References: <20240502115622.248456-1-angelogioacchino.delregno@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Document OF graph on MMSYS/VDOSYS: this supports up to three DDP paths per HW instance (so potentially up to six displays for multi-vdo SoCs). The MMSYS or VDOSYS is always the first component in the DDP pipeline, so it only supports an output port with multiple endpoints - where each endpoint defines the starting point for one of the (currently three) possible hardware paths. Signed-off-by: AngeloGioacchino Del Regno --- .../bindings/arm/mediatek/mediatek,mmsys.yaml | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml index b3c6888c1457..4e9acd966aa5 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml @@ -93,6 +93,29 @@ properties: '#reset-cells': const: 1 + port: + $ref: /schemas/graph.yaml#/properties/port + description: + Output port node. This port connects the MMSYS/VDOSYS output to + the first component of one display pipeline, for example one of + the available OVL or RDMA blocks. + Some MediaTek SoCs support up to three display outputs per MMSYS. + properties: + endpoint@0: + $ref: /schemas/graph.yaml#/properties/endpoint + description: Output to the primary display pipeline + + endpoint@1: + $ref: /schemas/graph.yaml#/properties/endpoint + description: Output to the secondary display pipeline + + endpoint@2: + $ref: /schemas/graph.yaml#/properties/endpoint + description: Output to the tertiary display pipeline + + required: + - endpoint@0 + required: - compatible - reg -- 2.45.0