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Thu, 02 May 2024 08:53:07 -0700 (PDT) Date: Thu, 2 May 2024 08:53:05 -0700 From: Drew Fustini To: Thomas Bonnefille Cc: Jisheng Zhang , Guo Ren , Fu Wei , Yangtao Li , Emil Renner Berthing , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Miquel Raynal , Thomas Petazzoni Subject: Re: [PATCH RFC v2 4/4] riscv: dts: thead: Add clock to TH1520 mmc controllers Message-ID: References: <20240426-th1520-clk-v2-v2-0-96b829e6fcee@tenstorrent.com> <20240426-th1520-clk-v2-v2-4-96b829e6fcee@tenstorrent.com> <1444dac5-c725-4bf7-8843-469a62c3abf1@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1444dac5-c725-4bf7-8843-469a62c3abf1@bootlin.com> On Thu, May 02, 2024 at 09:47:43AM +0200, Thomas Bonnefille wrote: > > > On 4/27/24 2:10 AM, Drew Fustini wrote: > > Change the clock property in the T-Head TH1520 mmc controller nodes to a > > real clock provided by the AP_SUBSYS clock driver. > > > > Signed-off-by: Drew Fustini > > I experienced that, when the I2C clocks were correctly configured, the UART > stopped working, likely due to their dependence on FOUTPOSTDIV. > Setting up the UART correctly, for instance: > > uartx: serial@xxxxxxxxxx { > ... > clocks = <&clk CLK_UART_SCLK>, <&clk > CLK_UARTX_PCLK>; > clock-names = "baudclk", "apb_pclk"; > ... > status = "disabled"; > }; > resolved the issue. > As this would be mandatory in the future, I suggest that you configure all > the nodes currently set to a fixed clock, not just the MMC controller. Thank you for testing and discovering this issue. Could you post your device tree so I can be sure I'm testing the same as what you have? Drew