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McKenney" To: Linus Torvalds Cc: Al Viro , John Paul Adrian Glaubitz , linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, elver@google.com, akpm@linux-foundation.org, tglx@linutronix.de, peterz@infradead.org, dianders@chromium.org, pmladek@suse.com, arnd@arndb.de, kernel-team@meta.com, Andi Shyti , Palmer Dabbelt , Masami Hiramatsu , linux-sh@vger.kernel.org Subject: Re: [PATCH v2 cmpxchg 12/13] sh: Emulate one-byte cmpxchg Message-ID: <628950f5-b220-48cb-a3a6-818be9e46f40@paulmck-laptop> Reply-To: paulmck@kernel.org References: <20240501230130.1111603-12-paulmck@kernel.org> <1376850f47279e3a3f4f40e3de2784ae3ac30414.camel@physik.fu-berlin.de> <6f7743601fe7bd50c2855a8fd1ed8f766ef03cac.camel@physik.fu-berlin.de> <9a4e1928-961d-43af-9951-71786b97062a@paulmck-laptop> <20240502205345.GK2118490@ZenIV> <0a429959-935d-4800-8d0c-4e010951996d@paulmck-laptop> <20240502220757.GL2118490@ZenIV> <3dac400c-d18f-4f4e-b598-cad6948362d6@paulmck-laptop> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Thu, May 02, 2024 at 04:32:35PM -0700, Linus Torvalds wrote: > On Thu, 2 May 2024 at 16:12, Paul E. McKenney wrote: > > > > One of RCU's state machines uses smp_store_release() to start the > > state machine (only one task gets to do this) and cmpxchg() to update > > state beyond that point. And the state is 8 bits so that it and other > > state fits into 32 bits to allow a single check for multiple conditions > > elsewhere. > > Note that since alpha lacks the release-acquire model, it's always > going to be a full memory barrier before the store. > > And then the store turns into a load-mask-store for older alphas. > > So it's going to be a complete mess from a performance standpoint regardless. And on those older machines, a mess functionally because the other three bytes in that same 32-bit word can be concurrently updated. Hence Arnd's patch being necessary here. EV56 and later all have single-byte stores, so they are OK. They were introduced in the mid-1990s, so even they are antiques. ;-) > Happily, I doubt anybody really cares. Here is hoping! > I've occasionally wondered if we have situations where the > "smp_store_release()" only cares about previous *writes* being ordered > (ie a "smp_wmb()+WRITE_ONCE" would be sufficient). Back in the day, rcu_assign_pointer() worked this way. But later there were a few use cases where ordering prior reads was needed. And in this case, we just barely need that full store-release functionality. There is a preceding mutex lock-unlock pair that provides a full barrier post-boot on almost all systems. > It makes no difference on x86 (all stores are relases), power64 (wmb > and store_release are both LWSYNC) or arm64 (str is documentated to be > cheaper than DMB). > > On alpha, smp_wmb()+WRITE_ONCE() is cheaper than smp_store_release(), > but nobody sane cares. > > But *if* we have a situation where the "smp_store_release()" might be > just a "previous writes need to be visible" rather than ordering > previous reads too, we could maybe introduce that kind of op. I > _think_ the RCU writes tend to be of that kind? Most of the time, rcu_assign_pointer() only needs to order prior writes, not both reads and writes. In theory, we could make an something like an rcu_assign_pointer_reads_too(), though hopefully with a shorter name, and go back to smp_wmb() for rcu_assign_pointer(). But in practice, I am having a really hard time convincing myself that it would be worth it. Thanx, Paul