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Fri, 3 May 2024 02:36:12 -0500 Received: from [172.24.227.88] (uda0500640.dhcp.ti.com [172.24.227.88]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4437a8oZ008242; Fri, 3 May 2024 02:36:09 -0500 Message-ID: Date: Fri, 3 May 2024 13:06:07 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH 2/2] arm64: dts: ti: k3-j784s4-evm: Enable USB3 support Content-Language: en-US To: Roger Quadros , , CC: , , , , , , , , Ravi Gunasekaran References: <20240502053615.29514-1-r-gunasekaran@ti.com> <20240502053615.29514-3-r-gunasekaran@ti.com> <865b6c46-b09c-4251-867c-992f008001ae@kernel.org> From: Ravi Gunasekaran In-Reply-To: <865b6c46-b09c-4251-867c-992f008001ae@kernel.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Roger, Rob On 5/3/24 12:18 PM, Roger Quadros wrote: > > > On 02/05/2024 08:36, Ravi Gunasekaran wrote: >> From: Matt Ranostay >> >> The board uses SERDES0 Lane 3 for USB3 IP. So update the >> SerDes lane info for USB. Add the pin mux data and >> enable USB3 support. >> >> Signed-off-by: Matt Ranostay >> Signed-off-by: Ravi Gunasekaran >> --- >> arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 41 ++++++++++++++++++++++++ >> 1 file changed, 41 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts >> index d511b25d62e3..bee73dab803d 100644 >> --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts >> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts >> @@ -336,6 +336,13 @@ >> J784S4_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AH33) MCAN13_RX.I2C4_SDA */ >> >; >> }; >> + >> + main_usbss0_pins_default: main-usbss0-pins-default { > > Should be main-usbss0-default-pins > > This should fix the checkpatch warning. > I will fix and send a v2 [...] -- Regards, Ravi