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From: Christian Marangi <ansuelsmth@gmail.com>
To: Hauke Mehrtens <hauke@hauke-m.de>,
	=?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
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	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Florian Fainelli <florian.fainelli@broadcom.com>,
	Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com>,
	Christian Marangi <ansuelsmth@gmail.com>,
	=?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>,
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Subject: [PATCH 3/6] dt-bindings: mips: brcm: Document mips-cbr-reg property
Date: Fri,  3 May 2024 15:54:03 +0200
Message-ID: <20240503135455.966-4-ansuelsmth@gmail.com>
In-Reply-To: <20240503135455.966-1-ansuelsmth@gmail.com>
References: <20240503135455.966-1-ansuelsmth@gmail.com>
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Document mips-cbr-reg and mips-broken-cbr-reg property.

Some SoC suffer from a BUG where read_c0_brcm_cbr() might return 0
if called from TP1. The CBR address is always the same on the SoC
hence it can be provided in DT to handle broken case where bootloader
doesn't init it or SMP where read_c0_brcm_cbr() returns 0 from TP1.

Usage of this property is to give an address also in these broken
configuration/bootloader.

If the SoC/Bootloader ALWAYS provide a broken CBR address the property
"mips-broken-cbr-reg" can be used to ignore any value already set in the
registers for CBR address.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
 .../devicetree/bindings/mips/brcm/soc.yaml    | 32 +++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/Documentation/devicetree/bindings/mips/brcm/soc.yaml b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
index 975945ca2888..12d394b7e011 100644
--- a/Documentation/devicetree/bindings/mips/brcm/soc.yaml
+++ b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
@@ -55,6 +55,21 @@ properties:
          under the "cpus" node.
         $ref: /schemas/types.yaml#/definitions/uint32
 
+      mips-broken-cbr-reg:
+        description: Declare that the Bootloader init a broken
+          CBR address in the registers and the one provided from
+          DT should always be used.
+        type: boolean
+
+      mips-cbr-reg:
+        description: Reference address of the CBR.
+          Some SoC suffer from a BUG where read_c0_brcm_cbr() might
+          return 0 if called from TP1. The CBR address is always the
+          same on the SoC hence it can be provided in DT to handle
+          broken case where bootloader doesn't init it or SMP where
+          read_c0_brcm_cbr() returns 0 from TP1.
+        $ref: /schemas/types.yaml#/definitions/uint32
+
     patternProperties:
       "^cpu@[0-9]$":
         type: object
@@ -64,6 +79,23 @@ properties:
     required:
       - mips-hpt-frequency
 
+dependencies:
+  mips-broken-cbr-reg: [ mips-cbr-reg ]
+
+if:
+  properties:
+    compatible:
+      contains:
+        anyOf:
+          - const: brcm,bcm6358
+          - const: brcm,bcm6368
+
+then:
+  properties:
+    cpus:
+      required:
+        - mips-cbr-reg
+
 additionalProperties: true
 
 examples:
-- 
2.43.0