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Date: Fri, 3 May 2024 17:21:41 +0100
From: Conor Dooley <conor@kernel.org>
To: Christian Marangi <ansuelsmth@gmail.com>
Cc: Hauke Mehrtens <hauke@hauke-m.de>,
	=?utf-8?B?UmFmYcWCIE1pxYJlY2tp?= <zajec5@gmail.com>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Florian Fainelli <florian.fainelli@broadcom.com>,
	Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com>,
	=?iso-8859-1?Q?=C1lvaro_Fern=E1ndez?= Rojas <noltari@gmail.com>,
	linux-mips@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Daniel =?iso-8859-1?Q?Gonz=E1lez?= Cabanelas <dgcbueu@gmail.com>
Subject: Re: [PATCH 3/6] dt-bindings: mips: brcm: Document mips-cbr-reg
 property
Message-ID: <20240503-oncoming-taste-bab71375b67c@spud>
References: <20240503135455.966-1-ansuelsmth@gmail.com>
 <20240503135455.966-4-ansuelsmth@gmail.com>
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On Fri, May 03, 2024 at 03:54:03PM +0200, Christian Marangi wrote:
> Document mips-cbr-reg and mips-broken-cbr-reg property.
>=20
> Some SoC suffer from a BUG where read_c0_brcm_cbr() might return 0
> if called from TP1. The CBR address is always the same on the SoC
> hence it can be provided in DT to handle broken case where bootloader
> doesn't init it or SMP where read_c0_brcm_cbr() returns 0 from TP1.
>=20
> Usage of this property is to give an address also in these broken
> configuration/bootloader.
>=20
> If the SoC/Bootloader ALWAYS provide a broken CBR address the property
> "mips-broken-cbr-reg" can be used to ignore any value already set in the
> registers for CBR address.
>=20
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> ---
>  .../devicetree/bindings/mips/brcm/soc.yaml    | 32 +++++++++++++++++++
>  1 file changed, 32 insertions(+)
>=20
> diff --git a/Documentation/devicetree/bindings/mips/brcm/soc.yaml b/Docum=
entation/devicetree/bindings/mips/brcm/soc.yaml
> index 975945ca2888..12d394b7e011 100644
> --- a/Documentation/devicetree/bindings/mips/brcm/soc.yaml
> +++ b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
> @@ -55,6 +55,21 @@ properties:
>           under the "cpus" node.
>          $ref: /schemas/types.yaml#/definitions/uint32
> =20
> +      mips-broken-cbr-reg:
> +        description: Declare that the Bootloader init a broken
> +          CBR address in the registers and the one provided from
> +          DT should always be used.

Why is this property even needed, is it not sufficient to just add the
mips-cbr-reg property to the DT for SoCs that need it and use the
property when present?

> +        type: boolean
> +
> +      mips-cbr-reg:

Missing a vendor prefix.

> +        description: Reference address of the CBR.
> +          Some SoC suffer from a BUG where read_c0_brcm_cbr() might
> +          return 0 if called from TP1. The CBR address is always the
> +          same on the SoC hence it can be provided in DT to handle
> +          broken case where bootloader doesn't init it or SMP where

s/init/initialise/ please :)

Thanks,
Conor.

> +          read_c0_brcm_cbr() returns 0 from TP1.
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +
>      patternProperties:
>        "^cpu@[0-9]$":
>          type: object
> @@ -64,6 +79,23 @@ properties:
>      required:
>        - mips-hpt-frequency
> =20
> +dependencies:
> +  mips-broken-cbr-reg: [ mips-cbr-reg ]
> +
> +if:
> +  properties:
> +    compatible:
> +      contains:
> +        anyOf:
> +          - const: brcm,bcm6358
> +          - const: brcm,bcm6368
> +
> +then:
> +  properties:
> +    cpus:
> +      required:
> +        - mips-cbr-reg
> +
>  additionalProperties: true
> =20
>  examples:
> --=20
> 2.43.0
>=20

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