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From: Christian Marangi <ansuelsmth@gmail.com>
To: Hauke Mehrtens <hauke@hauke-m.de>,
	=?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Florian Fainelli <florian.fainelli@broadcom.com>,
	Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com>,
	Christian Marangi <ansuelsmth@gmail.com>,
	=?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>,
	linux-mips@vger.kernel.org,
	devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	=?UTF-8?q?Daniel=20Gonz=C3=A1lez=20Cabanelas?= <dgcbueu@gmail.com>
Subject: [PATCH v2 3/5] dt-bindings: mips: brcm: Document brcm,bmips-cbr-reg property
Date: Fri,  3 May 2024 23:20:59 +0200
Message-ID: <20240503212139.5811-4-ansuelsmth@gmail.com>
In-Reply-To: <20240503212139.5811-1-ansuelsmth@gmail.com>
References: <20240503212139.5811-1-ansuelsmth@gmail.com>
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Document brcm,bmips-cbr-reg and brcm,bmips-broken-cbr-reg property.

Some SoC suffer from a BUG where read_c0_brcm_cbr() might return 0
if called from TP1. The CBR address is always the same on the SoC
hence it can be provided in DT to handle broken case where bootloader
doesn't init it or SMP where read_c0_brcm_cbr() returns 0 from TP1.

Usage of this property is to give an address also in these broken
configuration/bootloader.

If the SoC/Bootloader ALWAYS provide a broken CBR address the property
"brcm,bmips-broken-cbr-reg" can be used to ignore any value already set
in the registers for CBR address.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
 .../devicetree/bindings/mips/brcm/soc.yaml    | 32 +++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/Documentation/devicetree/bindings/mips/brcm/soc.yaml b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
index 975945ca2888..29af8f0db785 100644
--- a/Documentation/devicetree/bindings/mips/brcm/soc.yaml
+++ b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
@@ -55,6 +55,21 @@ properties:
          under the "cpus" node.
         $ref: /schemas/types.yaml#/definitions/uint32
 
+      brcm,bmips-broken-cbr-reg:
+        description: Declare that the Bootloader init a broken
+          CBR address in the registers and the one provided from
+          DT should always be used.
+        type: boolean
+
+      brcm,bmips-cbr-reg:
+        description: Reference address of the CBR.
+          Some SoC suffer from a BUG where read_c0_brcm_cbr() might
+          return 0 if called from TP1. The CBR address is always the
+          same on the SoC hence it can be provided in DT to handle
+          broken case where bootloader doesn't initialise it or SMP
+          where read_c0_brcm_cbr() returns 0 from TP1.
+        $ref: /schemas/types.yaml#/definitions/uint32
+
     patternProperties:
       "^cpu@[0-9]$":
         type: object
@@ -64,6 +79,23 @@ properties:
     required:
       - mips-hpt-frequency
 
+dependencies:
+  brcm,bmips-broken-cbr-reg: [ brcm,bmips-cbr-reg ]
+
+if:
+  properties:
+    compatible:
+      contains:
+        anyOf:
+          - const: brcm,bcm6358
+          - const: brcm,bcm6368
+
+then:
+  properties:
+    cpus:
+      required:
+        - brcm,bmips-cbr-reg
+
 additionalProperties: true
 
 examples:
-- 
2.43.0