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From: Andreas Kemnade <andreas@kemnade.info>
To: robh@kernel.org,
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Cc: Andreas Kemnade <andreas@kemnade.info>
Subject: [PATCH 2/2] ARM: dts: imx: Add Kobo Clara HD rev b
Date: Sat,  4 May 2024 23:53:44 +0200
Message-Id: <20240504215344.861327-3-andreas@kemnade.info>
In-Reply-To: <20240504215344.861327-1-andreas@kemnade.info>
References: <20240504215344.861327-1-andreas@kemnade.info>
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There is a variation of the Kobo Clara HD containing a PMIC with different
default settings for the regulators in the OTP and therefore also
regulators wired up in a different way, so add a proper devicetree for it
to avoid some magic smoke.

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
---
 arch/arm/boot/dts/nxp/imx/Makefile            |  1 +
 .../dts/nxp/imx/imx6sll-kobo-clarahd-b.dts    | 79 +++++++++++++++++++
 2 files changed, 80 insertions(+)
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clarahd-b.dts

diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx/Makefile
index 4052cad859fa9..a4826d128dfc7 100644
--- a/arch/arm/boot/dts/nxp/imx/Makefile
+++ b/arch/arm/boot/dts/nxp/imx/Makefile
@@ -288,6 +288,7 @@ dtb-$(CONFIG_SOC_IMX6SL) += \
 dtb-$(CONFIG_SOC_IMX6SLL) += \
 	imx6sll-evk.dtb \
 	imx6sll-kobo-clarahd.dtb \
+	imx6sll-kobo-clarahd-b.dtb \
 	imx6sll-kobo-librah2o.dtb
 dtb-$(CONFIG_SOC_IMX6SX) += \
 	imx6sx-nitrogen6sx.dtb \
diff --git a/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clarahd-b.dts b/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clarahd-b.dts
new file mode 100644
index 0000000000000..09b890fe915ab
--- /dev/null
+++ b/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clarahd-b.dts
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: (GPL-2.0)
+/*
+ * Device tree for the Kobo Clara HD Rev B ebook reader
+ *
+ * Name on mainboard is: 37NB-E60K00+4B0
+ * Serials start with: E60K02 (a number also seen in
+ * vendor kernel sources)
+ *
+ * Copyright 2024 Andreas Kemnade
+ */
+
+/dts-v1/;
+
+#include "imx6sll-kobo-clarahd.dts"
+
+/ {
+	model = "Kobo Clara HD Rev B";
+	compatible = "kobo,clarahd-b", "kobo,clarahd", "fsl,imx6sll";
+};
+
+&cpu0 {
+	arm-supply = <&dcdc5_reg>;
+	soc-supply = <&dcdc2_reg>;
+};
+
+&dcdc1_reg {
+	/delete-property/ regulator-min-microvolt;
+	/delete-property/ regulator-max-microvolt;
+
+	regulator-state-mem {
+		regulator-suspend-min-microvolt = <1040000>;
+		regulator-suspend-max-microvolt = <1040000>;
+	};
+};
+
+&dcdc2_reg {
+	regulator-min-microvolt = <660000>;
+	regulator-max-microvolt = <1000000>;
+
+	regulator-state-mem {
+		regulator-suspend-min-microvolt = <660000>;
+		regulator-suspend-max-microvolt = <660000>;
+	};
+};
+
+&dcdc3_reg {
+	/delete-property/ regulator-min-microvolt;
+	/delete-property/ regulator-max-microvolt;
+
+	regulator-state-mem {
+		regulator-suspend-min-microvolt = <3300000>;
+		regulator-suspend-max-microvolt = <3300000>;
+	};
+};
+
+&dcdc4_reg {
+	/delete-property/ regulator-min-microvolt;
+	/delete-property/ regulator-max-microvolt;
+
+	regulator-state-mem {
+		regulator-suspend-min-microvolt = <1700000>;
+		regulator-suspend-max-microvolt = <1700000>;
+	};
+};
+
+&dcdc5_reg {
+	regulator-min-microvolt = <710000>;
+	regulator-max-microvolt = <1100000>;
+
+	regulator-state-mem {
+		regulator-suspend-min-microvolt = <710000>;
+		regulator-suspend-max-microvolt = <710000>;
+	};
+};
+
+&ldo8_reg {
+		/delete-property/ regulator-min-microvolt;
+		/delete-property/ regulator-max-microvolt;
+};
-- 
2.39.2