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Date: Sun, 5 May 2024 18:05:06 +0200
From: Christian Marangi <ansuelsmth@gmail.com>
To: Conor Dooley <conor@kernel.org>
Cc: Hauke Mehrtens <hauke@hauke-m.de>,
	=?utf-8?B?UmFmYcWCIE1pxYJlY2tp?= <zajec5@gmail.com>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Florian Fainelli <florian.fainelli@broadcom.com>,
	Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com>,
	=?iso-8859-1?Q?=C1lvaro_Fern=E1ndez?= Rojas <noltari@gmail.com>,
	linux-mips@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Daniel =?iso-8859-1?Q?Gonz=E1lez?= Cabanelas <dgcbueu@gmail.com>
Subject: Re: [PATCH 3/6] dt-bindings: mips: brcm: Document mips-cbr-reg
 property
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On Fri, May 03, 2024 at 11:14:10PM +0100, Conor Dooley wrote:
> On Fri, May 03, 2024 at 09:33:35PM +0200, Christian Marangi wrote:
> > On Fri, May 03, 2024 at 05:21:41PM +0100, Conor Dooley wrote:
> > > On Fri, May 03, 2024 at 03:54:03PM +0200, Christian Marangi wrote:
> > > > Document mips-cbr-reg and mips-broken-cbr-reg property.
> > > > 
> > > > Some SoC suffer from a BUG where read_c0_brcm_cbr() might return 0
> > > > if called from TP1. The CBR address is always the same on the SoC
> > > > hence it can be provided in DT to handle broken case where bootloader
> > > > doesn't init it or SMP where read_c0_brcm_cbr() returns 0 from TP1.
> > > > 
> > > > Usage of this property is to give an address also in these broken
> > > > configuration/bootloader.
> > > > 
> > > > If the SoC/Bootloader ALWAYS provide a broken CBR address the property
> > > > "mips-broken-cbr-reg" can be used to ignore any value already set in the
> > > > registers for CBR address.
> > > > 
> > > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > > > ---
> > > >  .../devicetree/bindings/mips/brcm/soc.yaml    | 32 +++++++++++++++++++
> > > >  1 file changed, 32 insertions(+)
> > > > 
> > > > diff --git a/Documentation/devicetree/bindings/mips/brcm/soc.yaml b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
> > > > index 975945ca2888..12d394b7e011 100644
> > > > --- a/Documentation/devicetree/bindings/mips/brcm/soc.yaml
> > > > +++ b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
> > > > @@ -55,6 +55,21 @@ properties:
> > > >           under the "cpus" node.
> > > >          $ref: /schemas/types.yaml#/definitions/uint32
> > > >  
> > > > +      mips-broken-cbr-reg:
> > > > +        description: Declare that the Bootloader init a broken
> > > > +          CBR address in the registers and the one provided from
> > > > +          DT should always be used.
> > > 
> > > Why is this property even needed, is it not sufficient to just add the
> > > mips-cbr-reg property to the DT for SoCs that need it and use the
> > > property when present?
> > >
> > 
> > I described this in the cover letter.
> 
> It needs to be described in /this patch/. Cover letters usually don't
> end up in the commit history and I din't read them while looking for the
> justification for a change :)
> 
> > CBR might be set by the Bootloader
> > and might be not 0. In that case the value is ignored as an extra
> > precaution and the broken propetry is needed.
> 
> I dunno, if the bootloader is bad, you need to set a property anyway,
> so why not set mips-cbr-reg?
>

Florian any help here? Should I drop the additional property and set the
value directly?

One usecase we would use would be to set the CBR addr in the .dtsi and
maybe for the specific broken device use the additional property in the
dts.

> > > > +        type: boolean
> > > > +
> > > > +      mips-cbr-reg:
> > > 
> > > Missing a vendor prefix.
> > > 
> > 
> > I will change this to bmips,cbr-reg hope it's O.K.
> > 
> > > > +        description: Reference address of the CBR.
> > > > +          Some SoC suffer from a BUG where read_c0_brcm_cbr() might
> > > > +          return 0 if called from TP1. The CBR address is always the
> > > > +          same on the SoC hence it can be provided in DT to handle
> > > > +          broken case where bootloader doesn't init it or SMP where
> > > 
> > > s/init/initialise/ please :)
> > > 
> > 
> > Sure!
> > 
> > > Thanks,
> > > Conor.
> > > 
> > > > +          read_c0_brcm_cbr() returns 0 from TP1.
> > > > +        $ref: /schemas/types.yaml#/definitions/uint32
> > > > +
> > > >      patternProperties:
> > > >        "^cpu@[0-9]$":
> > > >          type: object
> > > > @@ -64,6 +79,23 @@ properties:
> > > >      required:
> > > >        - mips-hpt-frequency
> > > >  
> > > > +dependencies:
> > > > +  mips-broken-cbr-reg: [ mips-cbr-reg ]
> > > > +
> > > > +if:
> > > > +  properties:
> > > > +    compatible:
> > > > +      contains:
> > > > +        anyOf:
> > > > +          - const: brcm,bcm6358
> > > > +          - const: brcm,bcm6368
> > > > +
> > > > +then:
> > > > +  properties:
> > > > +    cpus:
> > > > +      required:
> > > > +        - mips-cbr-reg
> > > > +
> > > >  additionalProperties: true
> > > >  
> > > >  examples:
> > > > -- 
> > > > 2.43.0
> > > > 
> > 
> > 
> > 
> > -- 
> > 	Ansuel


-- 
	Ansuel