Received-SPF: pass (google.com: domain of linux-kernel+bounces-169283-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) client-ip=2604:1380:45d1:ec00::1;
Date: Sun, 5 May 2024 20:46:59 -0700
From: Ira Weiny <ira.weiny@intel.com>
To: Dan Williams <dan.j.williams@intel.com>, Ira Weiny <ira.weiny@intel.com>,
	Alison Schofield <alison.schofield@intel.com>
CC: Dave Jiang <dave.jiang@intel.com>, Fan Ni <fan.ni@samsung.com>, "Jonathan
 Cameron" <Jonathan.Cameron@huawei.com>, Navneet Singh
	<navneet.singh@intel.com>, Dan Williams <dan.j.williams@intel.com>,
	"Davidlohr Bueso" <dave@stgolabs.net>, Vishal Verma
	<vishal.l.verma@intel.com>, <linux-btrfs@vger.kernel.org>,
	<linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 05/26] cxl/core: Simplify cxl_dpa_set_mode()
Message-ID: <663852b3806f1_258421294be@iweiny-mobl.notmuch>
References: <20240324-dcd-type2-upstream-v1-0-b7b00d623625@intel.com>
 <20240324-dcd-type2-upstream-v1-5-b7b00d623625@intel.com>
 <ZhSPHvoTHl28GXt1@aschofie-mobl2>
 <6635366717079_e1f582941d@iweiny-mobl.notmuch>
 <6635b5e0e3954_1aefb294bf@dwillia2-mobl3.amr.corp.intel.com.notmuch>
Content-Type: text/plain; charset="us-ascii"
Content-Disposition: inline
In-Reply-To: <6635b5e0e3954_1aefb294bf@dwillia2-mobl3.amr.corp.intel.com.notmuch>
Precedence: bulk
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?0yA689V/YDqENvTcziRg05HCoI1o7EQsJOam4f0gBMedfeeCrTrZ2t4WEy8W?=
 =?us-ascii?Q?rFJoR/ArJgLoGOIi8U2+bCnLx43vucQj+gb5cc4ENeLBy0qn1w3mZ9352o2n?=
 =?us-ascii?Q?6HUnhSVSQ3JR51fg2vm9z3NADsc7qsjVBIUSVs7FggH31OJslFWG4KMnGj4V?=
 =?us-ascii?Q?qLjGhvrOR5cmfcAWCrY56c8jCgaZgZPgipBIfa4ZzZZv364aU0dJYGwTEpx3?=
 =?us-ascii?Q?aBSvqSJdJ4rGnOtHUIpW0pCo7GCwOU5LREYjL5FHUMkwwFthgjvccn1ZNO+k?=
 =?us-ascii?Q?ap2GCcJnYR5SjOFQm+jJW7HCPacvWFk6zN1/36ND2SFhQhlerdLXCgYUkeqv?=
 =?us-ascii?Q?Vqw01y7pvXXQscauSjVrcEq12aERtE19HB6KiAX/w6CJ2WnwCDwRnMz0z6y6?=
 =?us-ascii?Q?jloqxEbR96cPalZoWsDbViUw5AtAuKJe5wlO7uPNG51aGt95I4isHcxuXxW1?=
 =?us-ascii?Q?/3ZY/cime5GdPwCvfknlejT3CGWPCyBbCAsIrnYMd8YuMOXCkirkas+3O/0z?=
 =?us-ascii?Q?xiiXZXhhwU78NFzl6zQrO3EhMyQZAJcEdpQ37ksLrONG5T3uXROY4+Wsdy8y?=
 =?us-ascii?Q?adZiX8D8M4swQpt5spkF0dymULaNpVEOAxZTRoU0tXXLd29O89FsDms00vhU?=
 =?us-ascii?Q?XNEZNyoL4+g+GnjxXBIAPJ+pgrKcQWF0A50d2+bqSuye2w7jL0vOI/dHk1mV?=
 =?us-ascii?Q?2e56OjCtDfI4b49D7hgRHGQmJdxfBn3PU6iJf48QMsIPg7ql8Xg7TfxtojiS?=
 =?us-ascii?Q?+Z12r+Eq23hh7of+t5PXYz8yxs8Ing7dA5gI9OgDNBCsdNqvK9LJfKRqFkon?=
 =?us-ascii?Q?5bhXqE4xm/6yAcF5xp3zpnIeKgfT9EhXLFfxZLghxHsiq0/idMxNm1pQx6px?=
 =?us-ascii?Q?S2hCSgIk4tCSbp1dZM55fZgiwY2bedBKoqMS3IXR113hPHo/JDIVbnjuFs61?=
 =?us-ascii?Q?5gfQlf6IEbtpYmjD2v/I2z9Nm2vxIDbhXEQkWi0JV6MaqYo4iBklNwzrjRYf?=
 =?us-ascii?Q?LO+6oTFyHOLR4qPEye3E+svMJefEKdNvMcxtvOaXZ+n7LJX74W6jSj1QhrK1?=
 =?us-ascii?Q?myLs2ke2UmUF0vkeTeKwdoVO7kccWF5N9gA7t/9lODzjsSXRhSsJ5cl6V89t?=
 =?us-ascii?Q?H+ykALazYSOl9gGxfgN9WjYoPXA3d88a0lmqK7JkZmJ6sd+2qvfFHk4wLxT1?=
 =?us-ascii?Q?G7O+SdPIrMHmc9nz6oG8bIGIfVKFukRqNMmztL4lNwrxDi1Dv+Vprjn34UFZ?=
 =?us-ascii?Q?NUwpHEOibZqoJge2V9KMhlfZYd4KYPwkGfXzTktvEQihcspvCqY7oaigvjTE?=
 =?us-ascii?Q?iPVcSZs3xrXa2SXRjUnCXS5QTVB3358m8p3XEQAUVgXLUNohITgbsbb/hPUy?=
 =?us-ascii?Q?LVil7JoEIh1S6yiVOMHTiJQfAWVq37X6/HDC9s2cMcXw1LJ1GMJIXF61JR0H?=
 =?us-ascii?Q?ehIX4ARv1m8crJN6M99Wely0VSu6EJ7IMcEtNfGm7oTLWpw7NXExNb4Vp/SC?=
 =?us-ascii?Q?YPSxMKeUDy4SCHkUou9ZcOi5YDEOpB985lA9bBegR5dq/ZQNQJGkWwp5iFBc?=
 =?us-ascii?Q?7GNhyWbkzRgWZRPE0SxXBxJHASyXosivjlLY0bbc?=
X-MS-Exchange-CrossTenant-Network-Message-Id: e10b184f-0711-41ba-c0aa-08dc6d7f3099
X-MS-Exchange-CrossTenant-AuthSource: SA1PR11MB6733.namprd11.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2024 03:47:02.5620
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: q5K/AAFsNWDFKYhTeQkWVCBGzGgG1lzPlG4gEy0FLwT1BWSHzBo73OgnZFCDH8g5dznLbTuNFFIqcx+SbMVVKg==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV3PR11MB8481
X-OriginatorOrg: intel.com

Dan Williams wrote:
> Ira Weiny wrote:
> > Alison Schofield wrote:
> > > On Sun, Mar 24, 2024 at 04:18:08PM -0700, Ira Weiny wrote:
> > > > cxl_dpa_set_mode() checks the mode for validity two times, once outside
> > > > of the DPA RW semaphore and again within.
> > > 
> > > Not true.
> > 
> > Sorry for not being clear.  It does check the mode 2x but not for
> > validity.  I'll clarify.
> > 
> > > It only checks mode once before the lock. It checks for
> > > capacity after the lock. If it didn't check mode before the lock,
> > > then unsupported modes would fall through.
> > 
> > But we can check the mode 1 time and either check the size or fail.
> > 
> > > 
> > > > The function is not in a critical path.
> > > 
> > > Implying what here?  OK to check twice (even though it wasn't)
> > > or OK to expand scope of locking.
> > 
> > Implying that checking the mode outside the lock is not required.
> > 
> > > 
> > > > Prior to Dynamic Capacity the extra check was not much
> > > > of an issue.  The addition of DC modes increases the complexity of
> > > > the check.
> > > > 
> > > > Simplify the mode check before adding the more complex DC modes.
> > > > 
> > > 
> > > The addition of the DC mode check doesn't seem complex.
> > 
> > It is if you have to check it 2 times.
> > 
> > > 
> > > Pardon my picking at the words, but if you'd like to refactor the
> > > function, just say so. The final result is a bit more readable, but
> > > also adding the DC mode checks without refactoring would read fine
> > > also.
> > 
> > When I added the DC mode to this function without this refactoring it was
> > quite a bit more code and ugly IMO.  So this cleanup helped.  If I were
> > not adding the DC code there would be much less reason to change this
> > function.
> 
> Where did the "quite a bit more code" come from? A change that moves
> unnecessary code under a lock and is larger than just incrementally
> extending the status quo does not feel like a cleanup.

I'll drop the patch.

Ira

> 
> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
> index 7d97790b893d..0dc886bc22c6 100644
> --- a/drivers/cxl/core/hdm.c
> +++ b/drivers/cxl/core/hdm.c
> @@ -411,11 +411,12 @@ int cxl_dpa_set_mode(struct cxl_endpoint_decoder *cxled,
>         struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
>         struct cxl_dev_state *cxlds = cxlmd->cxlds;
>         struct device *dev = &cxled->cxld.dev;
> -       int rc;
> +       int rc, dcd;
>  
>         switch (mode) {
>         case CXL_DECODER_RAM:
>         case CXL_DECODER_PMEM:
> +       case CXL_DECODER_DC0 ... CXL_DECODER_DC7:
>                 break;
>         default:
>                 dev_dbg(dev, "unsupported mode: %d\n", mode);
> @@ -442,6 +443,11 @@ int cxl_dpa_set_mode(struct cxl_endpoint_decoder *cxled,
>                 rc = -ENXIO;
>                 goto out;
>         }
> +       dcd = dc_mode_to_region_index(mode);
> +       if (resource_size(&cxlds->dc_res[dcd]) == 0) {
> +               dev_dbg(dev, "no available dynamic capacity\n");
> +               goto out;
> +       }
>  
>         cxled->mode = mode;
>         rc = 0;