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AJvYcCVwsrZJe5x9WBnIwmrpQM8G5MncSVJUKM/p5DjmUMGyQrl2dIqReOW1THWEvztd4Te5Pyn9bwzIpz6u6XqWiqWHk97DOV9XQE6wDAUz X-Gm-Message-State: AOJu0YybL0r55kFQeNu0FTGQn1g3GuhU2R9/nqC7HXhWMvw+MhFgp4Hz 2NOaIBbs1D/xYsLABU7VCLpRn7dJ2un8ntNLdejxBQXDnrEdRB+motf7MsMPXR+yYzFvBuGnEyi U70K5cJg2GxDqCgt0aR/Ba6UPMDp240I7GZRwCQ== X-Received: by 2002:a5b:84c:0:b0:de8:8588:aada with SMTP id v12-20020a5b084c000000b00de88588aadamr9105336ybq.8.1714977840931; Sun, 05 May 2024 23:44:00 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240503162217.1999467-1-sean.anderson@linux.dev> In-Reply-To: <20240503162217.1999467-1-sean.anderson@linux.dev> From: Linus Walleij Date: Mon, 6 May 2024 08:43:49 +0200 Message-ID: Subject: Re: [PATCH 0/2] pinctrl: zynqmp: Support muxing individual pins To: Sean Anderson Cc: Michal Simek , linux-gpio@vger.kernel.org, Krishna Potthuri , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Conor Dooley , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, May 3, 2024 at 6:22=E2=80=AFPM Sean Anderson wrote: > This series adds support for muxing individual pins, instead of > requiring groups to be muxed together. See [1] for additional > discussion. > > [1] https://lore.kernel.org/linux-arm-kernel/5bb0dc7e-4c89-4f3d-abc6-41ae= 9ded5ae9@linux.dev/ The way I usually would recommend to solve this would be to define new subgroups, so e.g. for a UARTS: uart0_grp =3D pin_rx, pin_tx, pin_cts, pin_dts, pin_dcd; And today this would be used like that: mux0: function =3D "uart0"; groups =3D "uart0_grp"; Then we realize that not everyone need all the modem control signals provided. What to do. Well this: uart0_rxtx_grp =3D pin_rx, pin_tx: uart0_modem_grp =3D pin_cts, pin_dts, pin_dcd; mux0: function =3D "uart0"; groups =3D "uart0_rxtx_grp"; Now the CTS, DTS, DCD pins can be reused for something else such as GPIO. I *know* that this breaks ABI: the driver group definitions change and the device tree needs to be changed too. This only matters if the users have a habit of distributing the kernel and DTB separately so a new kernel needs to support and old DTB. This varies in how much control we have but I think for Xilinx systems the kernel and DTB are always updated in lockstep, so it really does not matter? Yours, Linus Walleij