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charset=UTF-8 Date: Mon, 06 May 2024 11:11:36 +0200 Message-Id: Cc: , , , , , , , , , , , , , , , , , , , , From: "Michael Walle" To: "AngeloGioacchino Del Regno" , Subject: Re: [PATCH v2 3/3] drm/mediatek: Implement OF graphs support for display paths X-Mailer: aerc 0.16.0 References: <20240409120211.321153-1-angelogioacchino.delregno@collabora.com> <20240409120211.321153-4-angelogioacchino.delregno@collabora.com> In-Reply-To: <20240409120211.321153-4-angelogioacchino.delregno@collabora.com> Hi Angelo, On Tue Apr 9, 2024 at 2:02 PM CEST, AngeloGioacchino Del Regno wrote: > +static int mtk_drm_of_get_ddp_ep_cid(struct device_node *node, > + int output_port, enum mtk_drm_crtc_path crtc_path, Not sure what's your base branch is, but "enum mtk_drm_crtc_path" was renamed to "enum mtk_crtc_path" in commit 9e149879038f5 ('drm/mediatek: Rename "mtk_drm_crtc" to "mtk_crtc"'). > +/** > + * mtk_drm_of_ddp_path_build_one - Build a Display HW Pipeline for a CRT= C Path > + * @dev: The mediatek-drm device > + * @cpath: CRTC Path relative to a VDO or MMSYS > + * @out_path: Pointer to an array that will contain the new pipeline > + * @out_path_len: Number of entries in the pipeline array > + * > + * MediaTek SoCs can use different DDP hardware pipelines (or paths) dep= ending > + * on the board-specific desired display configuration; this function wa= lks > + * through all of the output endpoints starting from a VDO or MMSYS hard= ware > + * instance and builds the right pipeline as specified in device trees. > + * > + * Return: > + * * %0 - Display HW Pipeline successfully built and validated > + * * %-ENOENT - Display pipeline was not specified in device tree > + * * %-EINVAL - Display pipeline built but validation failed > + * * %-ENOMEM - Failure to allocate pipeline array to pass to the caller > + */ > +static int mtk_drm_of_ddp_path_build_one(struct device *dev, enum mtk_dr= m_crtc_path cpath, likewise > + const unsigned int **out_path, > + unsigned int *out_path_len) -michael