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Mon, 06 May 2024 18:42:44 -0700 (PDT) From: Charlie Jenkins Date: Mon, 06 May 2024 18:40:45 -0700 Subject: [PATCH 4/8] riscv: Add PLATFORM_MAY_SUPPORT_RISCV_ISA_SVPBMT Kconfig option Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240506-compile_kernel_with_extensions-v1-4-5c25c134c097@rivosinc.com> References: <20240506-compile_kernel_with_extensions-v1-0-5c25c134c097@rivosinc.com> In-Reply-To: <20240506-compile_kernel_with_extensions-v1-0-5c25c134c097@rivosinc.com> To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Song Liu , Xi Wang , =?utf-8?q?Bj=C3=B6rn_T=C3=B6pel?= , =?utf-8?q?Cl=C3=A9ment_L=C3=A9ger?= Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Charlie Jenkins X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1715046158; l=2246; i=charlie@rivosinc.com; s=20231120; h=from:subject:message-id; bh=a5uHrD6/CgdRcxiHblwyx5kXSDkE21WZp1cyzlXEWj4=; b=bnTpAsp3Zw5Pq5X+mO5DVW5pxHHKVy8FUw83Bk2bzxERC5XixN3igHc8XRzJzdAfFDd6F0ZpQ qURkHGNHFlyCgGYDPobEFSDYFLG17QZXDtd4VvfBloYF51Nv4e0BVtE X-Developer-Key: i=charlie@rivosinc.com; a=ed25519; pk=t4RSWpMV1q5lf/NWIeR9z58bcje60/dbtxxmoSfBEcs= Svpbmt would not benefit from having PLATFORM_SUPPORTS_RISCV_ISA_SVPBMT so just rename RISCV_ISA_SVPBMT to PLATFORM_MAY_SUPPORT_RISCV_ISA_SVPBMT and move the definition to Kconfig.isa. Signed-off-by: Charlie Jenkins --- arch/riscv/Kconfig | 17 ----------------- arch/riscv/Kconfig.isa | 17 +++++++++++++++++ 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 9c3a4347953b..22303a3ab59e 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -484,23 +484,6 @@ config RISCV_ALTERNATIVE_EARLY help Allows early patching of the kernel for special errata -config RISCV_ISA_SVPBMT - bool "Svpbmt extension support for supervisor mode page-based memory types" - depends on 64BIT && MMU - depends on RISCV_ALTERNATIVE - default y - help - Add support for the Svpbmt ISA-extension (Supervisor-mode: - page-based memory types) in the kernel when it is detected at boot. - - The memory type for a page contains a combination of attributes - that indicate the cacheability, idempotency, and ordering - properties for access to that page. - - The Svpbmt extension is only available on 64-bit cpus. - - If you don't know what to do here, say Y. - config TOOLCHAIN_HAS_ZBB bool default y diff --git a/arch/riscv/Kconfig.isa b/arch/riscv/Kconfig.isa index 37585bcd763e..50e217dc5719 100644 --- a/arch/riscv/Kconfig.isa +++ b/arch/riscv/Kconfig.isa @@ -168,3 +168,20 @@ config PLATFORM_SUPPORTS_RISCV_ISA_SVNAPOT not support Svnapot. endchoice + +config RISCV_ISA_SVPBMT + bool "Svpbmt extension support for supervisor mode page-based memory types" + depends on 64BIT && MMU + depends on RISCV_ALTERNATIVE + default y + help + Add support for the Svpbmt ISA-extension (Supervisor-mode: + page-based memory types) in the kernel when it is detected at boot. + + The memory type for a page contains a combination of attributes + that indicate the cacheability, idempotency, and ordering + properties for access to that page. + + The Svpbmt extension is only available on 64-bit cpus. + + If you don't know what to do here, say Y. -- 2.44.0