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Mon, 06 May 2024 18:42:40 -0700 (PDT) From: Charlie Jenkins Date: Mon, 06 May 2024 18:40:42 -0700 Subject: [PATCH 1/8] riscv: Add PLATFORM_MAY_SUPPORT_RISCV_ISA_C Kconfig option Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240506-compile_kernel_with_extensions-v1-1-5c25c134c097@rivosinc.com> References: <20240506-compile_kernel_with_extensions-v1-0-5c25c134c097@rivosinc.com> In-Reply-To: <20240506-compile_kernel_with_extensions-v1-0-5c25c134c097@rivosinc.com> To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Song Liu , Xi Wang , =?utf-8?q?Bj=C3=B6rn_T=C3=B6pel?= , =?utf-8?q?Cl=C3=A9ment_L=C3=A9ger?= Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Charlie Jenkins X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1715046158; l=5775; i=charlie@rivosinc.com; s=20231120; h=from:subject:message-id; bh=9E+2LlRyJf3rtGlOBhbopLxrTNkU6Xw7Fp6ra7sa6aw=; b=k/qKiLIMvmJ90rd1YTXngnEJRwKO8kGBQZf+APAC5CZ1sloS8A25+YytARmKTTvmNP+IkLjri cazABYZHlYsDSt+hvd03k1xMjto5tOexlRaM5aKXwgjWVr3MEZAkbVA X-Developer-Key: i=charlie@rivosinc.com; a=ed25519; pk=t4RSWpMV1q5lf/NWIeR9z58bcje60/dbtxxmoSfBEcs= Introduce a "Kernel ISA" menu and migrate the compressed instruction support options into a new file Kconfig.isa. Add a new option "PLATFORM_MAY_SUPPORT_RISCV_ISA_C" that can be used to conditionally emit C extensions if the hardware supports it. Signed-off-by: Charlie Jenkins --- arch/riscv/Kconfig | 19 +++++++----------- arch/riscv/Kconfig.isa | 41 ++++++++++++++++++++++++++++++++++++++ arch/riscv/Makefile | 4 ++-- arch/riscv/kernel/probes/uprobes.c | 2 +- arch/riscv/net/bpf_jit.h | 4 +++- 5 files changed, 54 insertions(+), 16 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index c8bdfd33abf4..c2a4f5364707 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -369,6 +369,12 @@ config ARCH_RV64I endchoice +menu "Kernel ISA" + +source "arch/riscv/Kconfig.isa" + +endmenu + # We must be able to map all physical memory into the kernel, but the compiler # is still a bit more efficient when generating code if it's setup in a manner # such that it can only map 2GiB of memory. @@ -478,17 +484,6 @@ config RISCV_ALTERNATIVE_EARLY help Allows early patching of the kernel for special errata -config RISCV_ISA_C - bool "Emit compressed instructions when building Linux" - default y - help - Adds "C" to the ISA subsets that the toolchain is allowed to emit - when building Linux, which results in compressed instructions in the - Linux binary. This option produces a kernel that will not run on - systems that do not support compressed instructions. - - If you don't know what to do here, say Y. - config RISCV_ISA_SVNAPOT bool "Svnapot extension support for supervisor mode NAPOT pages" depends on 64BIT && MMU @@ -937,6 +932,7 @@ config EFI bool "UEFI runtime support" depends on OF && !XIP_KERNEL depends on MMU + depends on PLATFORM_SUPPORTS_RISCV_ISA_C default y select ARCH_SUPPORTS_ACPI if 64BIT select EFI_GENERIC_STUB @@ -944,7 +940,6 @@ config EFI select EFI_RUNTIME_WRAPPERS select EFI_STUB select LIBFDT - select RISCV_ISA_C select UCS2_STRING help This option provides support for runtime services provided diff --git a/arch/riscv/Kconfig.isa b/arch/riscv/Kconfig.isa new file mode 100644 index 000000000000..08b7af5aabb0 --- /dev/null +++ b/arch/riscv/Kconfig.isa @@ -0,0 +1,41 @@ +config RISCV_ISA_C + bool + +choice + prompt "Compressed instruction support" + default PLATFORM_SUPPORTS_RISCV_ISA_C + help + This selects the level of support for compressed instructions to be + built into the Linux Kernel. This does not impact whether compressed + instructions are allowed to be emitted by user-space code. + +config PROHIBIT_RISCV_ISA_C + bool "Prohibit compressed instructions" + depends on NONPORTABLE + help + Regardless of if the platform supports compressed instructions, + prohibit the kernel from emitting compressed instructions. + +config PLATFORM_MAY_SUPPORT_RISCV_ISA_C + bool "Allow compressed instructions sequences if supported" + depends on FPU + depends on NONPORTABLE + select RISCV_ISA_C + help + Only allow compressed instructions to be emitted if "C" is present in + the device tree or ACPI table. No compressed instructions will be + emitted if the platform does not support them. + +config PLATFORM_SUPPORTS_RISCV_ISA_C + bool "Emit compressed instructions when building Linux" + depends on FPU + select RISCV_ISA_C + help + Adds "C" to the ISA subsets that the toolchain is allowed to emit + when building Linux, which results in compressed instructions in the + Linux binary. This option produces a kernel that will not run on + systems that do not support compressed instructions. + + If you don't know what to do here, say Y. + +endchoice diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 5b3115a19852..e1be36004097 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -14,7 +14,7 @@ endif ifeq ($(CONFIG_DYNAMIC_FTRACE),y) LDFLAGS_vmlinux += --no-relax KBUILD_CPPFLAGS += -DCC_USING_PATCHABLE_FUNCTION_ENTRY -ifeq ($(CONFIG_RISCV_ISA_C),y) +ifeq ($(CONFIG_PLATFORM_SUPPORTS_RISCV_ISA_C),y) CC_FLAGS_FTRACE := -fpatchable-function-entry=4 else CC_FLAGS_FTRACE := -fpatchable-function-entry=2 @@ -65,7 +65,7 @@ endif riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd -riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c +riscv-march-$(CONFIG_PLATFORM_SUPPORTS_RISCV_ISA_C) := $(riscv-march-y)c riscv-march-$(CONFIG_RISCV_ISA_V) := $(riscv-march-y)v ifdef CONFIG_TOOLCHAIN_NEEDS_OLD_ISA_SPEC diff --git a/arch/riscv/kernel/probes/uprobes.c b/arch/riscv/kernel/probes/uprobes.c index 4b3dc8beaf77..a468689a6f6d 100644 --- a/arch/riscv/kernel/probes/uprobes.c +++ b/arch/riscv/kernel/probes/uprobes.c @@ -11,7 +11,7 @@ bool is_swbp_insn(uprobe_opcode_t *insn) { -#ifdef CONFIG_RISCV_ISA_C +#ifdef CONFIG_PLATFORM_SUPPORTS_RISCV_ISA_C return (*insn & 0xffff) == UPROBE_SWBP_INSN; #else return *insn == UPROBE_SWBP_INSN; diff --git a/arch/riscv/net/bpf_jit.h b/arch/riscv/net/bpf_jit.h index f4b6b3b9edda..259294bdbc3a 100644 --- a/arch/riscv/net/bpf_jit.h +++ b/arch/riscv/net/bpf_jit.h @@ -15,7 +15,9 @@ static inline bool rvc_enabled(void) { - return IS_ENABLED(CONFIG_RISCV_ISA_C); + return IS_ENABLED(CONFIG_PLATFORM_SUPPORTS_RISCV_ISA_C) || + (IS_ENABLED(CONFIG_PLATFORM_MAY_SUPPORT_RISCV_ISA_C) && + riscv_has_extension_likely(RISCV_ISA_EXT_c)); } static inline bool rvzbb_enabled(void) -- 2.44.0