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[98.197.58.203]) by smtp.gmail.com with ESMTPSA id hg13-20020a056870790d00b002396fd308basm2333895oab.35.2024.05.06.19.48.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 May 2024 19:48:03 -0700 (PDT) From: Alexandru Gagniuc To: Bjorn Andersson , Konrad Dybcio , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Marko , linux-arm-msm@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Alexandru Gagniuc Subject: [PATCH v2 2/2] arm64: dts: qcom: ipq9574: add MDIO bus Date: Mon, 6 May 2024 21:47:58 -0500 Message-Id: <20240507024758.2810514-2-mr.nuke.me@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240507024758.2810514-1-mr.nuke.me@gmail.com> References: <20240507024758.2810514-1-mr.nuke.me@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The IPQ95xx uses an IPQ4019 compatible MDIO controller that is already supported. Add a DT node to expose it. Signed-off-by: Alexandru Gagniuc --- changes since v1: - pad "reg" address to eight digits with leading zeroes arch/arm64/boot/dts/qcom/ipq9574.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 7f2e5cbf3bbb..ded02bc39275 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -232,6 +232,16 @@ rng: rng@e3000 { clock-names = "core"; }; + mdio: mdio@90000 { + compatible = "qcom,ipq9574-mdio", "qcom,ipq4019-mdio"; + reg = <0x00090000 0x64>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&gcc GCC_MDIO_AHB_CLK>; + clock-names = "gcc_mdio_ahb_clk"; + status = "disabled"; + }; + qfprom: efuse@a4000 { compatible = "qcom,ipq9574-qfprom", "qcom,qfprom"; reg = <0x000a4000 0x5a1>; -- 2.40.1