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Date: Tue, 7 May 2024 10:05:53 +0200
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Arseniy Krasnov <avkrasnov@salutedevices.com>
Cc: Richard Weinberger <richard@nod.at>, Vignesh Raghavendra
 <vigneshr@ti.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski
 <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>,
 Neil Armstrong <neil.armstrong@linaro.org>, Kevin Hilman
 <khilman@baylibre.com>, Jerome Brunet <jbrunet@baylibre.com>, Martin
 Blumenstingl <martin.blumenstingl@googlemail.com>,
 <linux-mtd@lists.infradead.org>, <devicetree@vger.kernel.org>,
 <linux-arm-kernel@lists.infradead.org>,
 <linux-amlogic@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
 <oxffffaa@gmail.com>, <kernel@sberdevices.ru>
Subject: Re: [PATCH v5 1/2] dt-bindings: mtd: amlogic,meson-nand: support
 fields for boot ROM code
Message-ID: <20240507100553.31578d0d@xps-13>
In-Reply-To: <e3ea7238-c80d-dfe9-28bf-df95708872d6@salutedevices.com>
References: <20240416085101.740458-1-avkrasnov@salutedevices.com>
	<20240416085101.740458-2-avkrasnov@salutedevices.com>
	<20240506154858.003bab54@xps-13>
	<d90f9d3d-7823-503f-4cc6-73783a083d0e@salutedevices.com>
	<20240507092726.4ab1afdb@xps-13>
	<e3ea7238-c80d-dfe9-28bf-df95708872d6@salutedevices.com>
Organization: Bootlin
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Hi Arseniy,

avkrasnov@salutedevices.com wrote on Tue, 7 May 2024 10:35:51 +0300:

> On 07.05.2024 10:27, Miquel Raynal wrote:
> > Hi Arseniy,
> >=20
> > avkrasnov@salutedevices.com wrote on Tue, 7 May 2024 09:53:06 +0300:
> >  =20
> >> On 06.05.2024 16:48, Miquel Raynal wrote: =20
> >>> Hi Arseniy,
> >>>
> >>> avkrasnov@salutedevices.com wrote on Tue, 16 Apr 2024 11:51:00 +0300:
> >>>    =20
> >>>> Boot ROM code on Meson requires that some pages on NAND must be writ=
ten
> >>>> in special mode: "short" ECC mode where each block is 384 bytes and
> >>>> scrambling mode is on.   =20
> >>>
> >>> Ok
> >>>    =20
> >>>> Such pages located with the specified interval within specified offs=
et.   =20
> >>>
> >>> I'm sorry I don't get that sentence.   =20
> >>
> >> Sorry, I mean this (let me draw :) ) :
> >>
> >> [ page 0 ][ page 1 ][ page 2 ][ page 3 ][ page 4 ][ page 5 ][ page 6 ]=
[ page 7 ][ page 8 ][ page 9 ]
> >>
> >> For example, we have 10 pages starting from the beginning of the chip =
- this is "within specified offset",
> >> e.g. offset is 10. BootROM on axg needs that (for example) every third=
 page must be written in "special"
> >> mode: scrambling is on and ECC is 384 bytes. Such pages are 0, 2, 4, 6=
, 8. E.g. "specified interval" will
> >> be 3. =20
> >=20
> > Shall be 2, no? =20
>=20
> yes, starting from 0 - then 2. e.g.
> if (!(page_num % 2))
>     boot ROM need this page
>=20
> >  =20
> >>
> >> So:
> >>
> >> amlogic,boot-pages: 10
> >> amlogic,boot-page-step: 3 =20
> >=20
> > Ok I get it. Thanks for the explanation. I don't really understand the
> > logic behind it though. Do you know why the bootROM would access only
> > one page over 2 or 3? Is there a default value? Is this configurable? =
=20
>=20
> No, boot rom source is closed, I don't have access to it. I get this logic
> from old version of vendor's uboot - in practice they use non 2 or 3, they
> use hardcoded 128 step value. And amlogic,boot-pages is 1024

Feels like they are trying to use only the first page of each block, no?

That's very weird but I understand better.

Thanks,
Miqu=C3=A8l