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From: "Tian, Kevin" <kevin.tian@intel.com>
To: "Zhao, Yan Y" <yan.y.zhao@intel.com>, "kvm@vger.kernel.org"
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	<baolu.lu@linux.intel.com>, "Liu, Yi L" <yi.l.liu@intel.com>
Subject: RE: [PATCH 2/5] KVM: x86/mmu: Fine-grained check of whether a invalid
 & RAM PFN is MMIO
Thread-Topic: [PATCH 2/5] KVM: x86/mmu: Fine-grained check of whether a
 invalid & RAM PFN is MMIO
Thread-Index: AQHaoEa3CD/Y9R0aGku+9PW3d/i4u7GLcuAA
Date: Tue, 7 May 2024 08:39:27 +0000
Message-ID: <BN9PR11MB5276CABD8B3E1772932E2E3D8CE42@BN9PR11MB5276.namprd11.prod.outlook.com>
References: <20240507061802.20184-1-yan.y.zhao@intel.com>
 <20240507062009.20336-1-yan.y.zhao@intel.com>
In-Reply-To: <20240507062009.20336-1-yan.y.zhao@intel.com>
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> From: Zhao, Yan Y <yan.y.zhao@intel.com>
> Sent: Tuesday, May 7, 2024 2:20 PM
> @@ -101,9 +101,21 @@ static bool kvm_is_mmio_pfn(kvm_pfn_t pfn)
>  			 */
>  			(!pat_enabled() ||
> pat_pfn_immune_to_uc_mtrr(pfn));
>=20
> +	/*
> +	 * If the PFN is invalid and not RAM in raw e820 table, keep treating i=
t
> +	 * as MMIO.
> +	 *
> +	 * If the PFN is invalid and is RAM in raw e820 table,
> +	 * - if PAT is not enabled, always treat the PFN as MMIO to avoid
> futher
> +	 *   checking of MTRRs.
> +	 * - if PAT is enabled, treat the PFN as MMIO if its PAT is UC/WC/UC-
> in
> +	 *   primary MMU.
> +	 * to prevent guest cacheable access to MMIO PFNs.
> +	 */
>  	return !e820__mapped_raw_any(pfn_to_hpa(pfn),
>  				     pfn_to_hpa(pfn + 1) - 1,
> -				     E820_TYPE_RAM);
> +				     E820_TYPE_RAM) ? true :
> +				     (!pat_enabled() ||
> pat_pfn_immune_to_uc_mtrr(pfn));

Is it for another theoretical problem in case the primary
mmu uses a non-WB type on a invalid RAM-type pfn so
you want to do additional scrutiny here?