Received: by 2002:a89:288:0:b0:1f7:eeee:6653 with SMTP id j8csp502452lqh; Tue, 7 May 2024 06:06:35 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCXZkCk5Emu2+GiZmng1SRmb0m2I06ZVf/miP1ccsW/Vkp2j7Zk3q7WNAogDPAOOCdNoAwWZ/wGL5srk37hP7/2Tv0C6I0PK2U+wXLmaVA== X-Google-Smtp-Source: AGHT+IE4W2OarTNA33tWXsZILRywjFti6ocibXjYb+a1JTtmyX1MlSrl7SxNmrxFdvWslXxw2d/i X-Received: by 2002:a17:906:3e02:b0:a55:adec:7139 with SMTP id k2-20020a1709063e0200b00a55adec7139mr6996566eji.60.1715087195616; Tue, 07 May 2024 06:06:35 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1715087195; cv=pass; d=google.com; s=arc-20160816; b=Tpm1t0LdE+tDQ8j3qefUsniIe/gptrptg8kv1Ch/y8f/Kgj+wFGWpyjTi8Nf4iUOiu Kgh/2jUmyF/VKr+dUwIq0WdMCzYaT/XlILvcIxKG9o4t7Zeje+IWzxRZkATt0/nTAl2I j2HYwgweqQx8CEaAWxP9dNLMM7TX2K9PHGQw5aXWfPwMYYdcbqoz7GNXyzTIanubO8bt LICjaR1RGjnVKQJvcrVbvHH/BWo9TgMI/Yu46mW5FNZs2HKuUN7+vnipf4HoG8hOGPcf BlVjQLiSPzOyet96D1V6LyEG4qs6jJ1xABNkkUJwZHRM5Ip5uuzNWqbnFkh8QgvlsJwm 4E7A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=0RepwHau/d9spJSH1Sl3WD9M7XJFlicXdJoUYlAuaaE=; fh=pZr6MZM5KYOIXjEdaDZFhqcAknzCCzjS05j4eIEmwvs=; b=DR9+rg86UdcNJ7DNpplkkFOY0M9jD9KYCanpIhBdt829e8+RPZM8G+z4HNAkYPCDGW ZifC2dukKkS3N91LuJ5RgxbbD/RlmAU+KDuHl3lLhCL7FvYZf9ZlemV6r63EYRPvKIbC wbSGO5IXGv7q//IOIMsM0K8a7XPJjNRNG+IQVnSp0MKrY+IySftAlvqPjppAICmIy/L3 7TGG9LWVcOvc+A3zqo0+uP2kRimMO+BQ1mi4vRsdgy0CLvYvBLKBS7iR9fLiReIGadTn c2ekqLzcOgpaliFyHhDWwEOeLE+W+CIQ43IPNY2ixVNkLdI5X7teYI+TpK1YQ8Tz6psb 8PMg==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=K9hi1qas; arc=pass (i=1 spf=pass spfdomain=quicinc.com dkim=pass dkdomain=quicinc.com dmarc=pass fromdomain=quicinc.com); spf=pass (google.com: domain of linux-kernel+bounces-171339-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-171339-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Return-Path: Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [2604:1380:4601:e00::3]) by mx.google.com with ESMTPS id hh6-20020a170906a94600b00a59c9ccc996si2678927ejb.644.2024.05.07.06.06.35 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 May 2024 06:06:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-171339-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=K9hi1qas; arc=pass (i=1 spf=pass spfdomain=quicinc.com dkim=pass dkdomain=quicinc.com dmarc=pass fromdomain=quicinc.com); spf=pass (google.com: domain of linux-kernel+bounces-171339-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-171339-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 5A4E71F226A2 for ; Tue, 7 May 2024 13:06:35 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 110D215E5D7; Tue, 7 May 2024 13:06:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="K9hi1qas" Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D590115E218; Tue, 7 May 2024 13:06:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715087168; cv=none; b=PEiJGbOYTjDZDZ0Y7TYa/VKnZmCyCIY/GtQLZwW0JdObGdsaZzqSWP9vN095Op9EKGNSCJty3JiOBkON3b9HgpuVcgS0656BmUdi79L22qVixx2HRdO33woCb1h7A7DUQHmUJ0768GUmjs/rTOFYwVpomh+qcgl1MTLwgW5OkLc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715087168; c=relaxed/simple; bh=HGCQPQ8x93bOIwr55Kq5+6ZUP9VipvONFNTY8lTlIO8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ioE1txa2RbBq4TXEPpS5Vz2cBcIF4r+2q6tj91n7OJhv1E7USGqNkN22E6Vs0652gGsb8QLr8OjGLlxsxpKPjULkV4qn5n5/HtvlqF25qLaECw4V0T/jMSKP1QZBFowIJl+xvQae2l/Op6qYdDBzF5HgOYfwJsEBVLPbfd8uWB8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=K9hi1qas; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4478r0gs031464; Tue, 7 May 2024 13:05:50 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=0RepwHau/d9spJSH1Sl3WD9M7XJFlicXdJoUYlAuaaE=; b=K9 hi1qasEdaC6JkJLEi5x8Lxl+J3687/qdFTPMYavaXPKmQsg8X80IBIy2Azye0Z5O oECS5Qb+IzgGJMrjQ+CM7t3tZQ8oYLh8iCpfjmsEf9T34/9uceza3QdXovlxyEYL YacaUHFqXtxEMdk4/64RMuBtvB7xvtSangckyo9toh7aB46/yF7s38N2VcaCkVqG wt1gWe6eaulEYqJdZpb+IqyksikV9jy/qbdHEc5RbGpsLL9AlirK82Sjw4/KpcXK YBCj2LQZb2dwdZUI7IeQlU1CVnP03gzGjrm4K8XVXbBVl/qPhUwvh0h0GAKs6aNE EbZgmb1M9h9kQjSdhvbw== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3xyc03h742-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 07 May 2024 13:05:50 +0000 (GMT) Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 447D5n68004463 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 7 May 2024 13:05:49 GMT Received: from luoj-gv.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 7 May 2024 06:05:45 -0700 From: Luo Jie To: , , , , , , CC: , , , , Subject: [PATCH v14 1/4] clk: qcom: branch: Add clk_branch2_prepare_ops Date: Tue, 7 May 2024 21:05:28 +0800 Message-ID: <20240507130531.3286999-2-quic_luoj@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240507130531.3286999-1-quic_luoj@quicinc.com> References: <20240507130531.3286999-1-quic_luoj@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: T0FDk7NW_qIPKA4smUEGFqB1FvJfo2LN X-Proofpoint-GUID: T0FDk7NW_qIPKA4smUEGFqB1FvJfo2LN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-07_06,2024-05-06_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 malwarescore=0 phishscore=0 mlxscore=0 suspectscore=0 priorityscore=1501 mlxlogscore=901 adultscore=0 impostorscore=0 lowpriorityscore=0 clxscore=1015 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2404010003 definitions=main-2405070090 Add the clk_branch2_prepare_ops for supporting clock controller where the hardware register is accessed by MDIO bus, and the spin lock can't be used because of sleep during the MDIO operation. The clock is enabled by the .prepare instead of .enable when the clk_branch2_prepare_ops is used. Signed-off-by: Luo Jie Acked-by: Stephen Boyd --- drivers/clk/qcom/clk-branch.c | 7 +++++++ drivers/clk/qcom/clk-branch.h | 1 + 2 files changed, 8 insertions(+) diff --git a/drivers/clk/qcom/clk-branch.c b/drivers/clk/qcom/clk-branch.c index c1dba33ac31a..229480c5b075 100644 --- a/drivers/clk/qcom/clk-branch.c +++ b/drivers/clk/qcom/clk-branch.c @@ -191,3 +191,10 @@ const struct clk_ops clk_branch_simple_ops = { .is_enabled = clk_is_enabled_regmap, }; EXPORT_SYMBOL_GPL(clk_branch_simple_ops); + +const struct clk_ops clk_branch2_prepare_ops = { + .prepare = clk_branch2_enable, + .unprepare = clk_branch2_disable, + .is_prepared = clk_is_enabled_regmap, +}; +EXPORT_SYMBOL_GPL(clk_branch2_prepare_ops); diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h index f1b3b635ff32..292756435f53 100644 --- a/drivers/clk/qcom/clk-branch.h +++ b/drivers/clk/qcom/clk-branch.h @@ -109,6 +109,7 @@ extern const struct clk_ops clk_branch2_ops; extern const struct clk_ops clk_branch_simple_ops; extern const struct clk_ops clk_branch2_aon_ops; extern const struct clk_ops clk_branch2_mem_ops; +extern const struct clk_ops clk_branch2_prepare_ops; #define to_clk_branch(_hw) \ container_of(to_clk_regmap(_hw), struct clk_branch, clkr) -- 2.34.1