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Date: Tue, 7 May 2024 09:48:35 -0500
From: "Rob Herring (Arm)" <robh@kernel.org>
To: Tomasz Jeznach <tjeznach@rivosinc.com>
Cc: Robin Murphy <robin.murphy@arm.com>, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, Anup Patel <apatel@ventanamicro.com>,
	Joerg Roedel <joro@8bytes.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Sebastien Boeuf <seb@rivosinc.com>,
	Nick Kossifidis <mick@ics.forth.gr>,
	linux-riscv@lists.infradead.org, iommu@lists.linux.dev,
	Conor Dooley <conor+dt@kernel.org>,
	Rob Herring <robh+dt@kernel.org>, linux@rivosinc.com,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Albert Ou <aou@eecs.berkeley.edu>, Will Deacon <will@kernel.org>,
	Conor Dooley <conor.dooley@microchip.com>,
	Sunil V L <sunilvl@ventanamicro.com>
Subject: Re: [PATCH v4 1/7] dt-bindings: iommu: riscv: Add bindings for
 RISC-V IOMMU
Message-ID: <171508897177.213758.18021668060802877165.robh@kernel.org>
References: <cover.1714752293.git.tjeznach@rivosinc.com>
 <845127470ad85f9b4f690077968fe8c5d615c538.1714752293.git.tjeznach@rivosinc.com>
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On Fri, 03 May 2024 09:12:34 -0700, Tomasz Jeznach wrote:
> Add bindings for the RISC-V IOMMU device drivers.
> 
> Co-developed-by: Anup Patel <apatel@ventanamicro.com>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com>
> ---
>  .../bindings/iommu/riscv,iommu.yaml           | 147 ++++++++++++++++++
>  MAINTAINERS                                   |   7 +
>  2 files changed, 154 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/iommu/riscv,iommu.yaml
> 

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>