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Tue, 7 May 2024 15:45:00 +0000 (UTC) From: Paolo Bonzini To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org Subject: [PATCH 0/7] KVM: MMU changes for TDX VE support Date: Tue, 7 May 2024 11:44:52 -0400 Message-ID: <20240507154459.3950778-1-pbonzini@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Allow a non-zero value for non-present SPTE and removed SPTE, so that TDX can set the "suppress VE" bit. This is taken from https://patchew.org/linux/20240416201935.3525739-1-pbonzini@redhat.com/ with review comments addressed: - do not dereference an address from the VMCS to include #VE info in the dump - fail hard if the #VE info page cannot be allocated Paolo Isaku Yamahata (2): KVM: x86/mmu: Add Suppress VE bit to EPT shadow_mmio_mask/shadow_present_mask KVM: VMX: Introduce test mode related to EPT violation VE Paolo Bonzini (1): KVM, x86: add architectural support code for #VE Sean Christopherson (4): KVM: Allow page-sized MMU caches to be initialized with custom 64-bit values KVM: x86/mmu: Replace hardcoded value 0 for the initial value for SPTE KVM: x86/mmu: Allow non-zero value for non-present SPTE and removed SPTE KVM: x86/mmu: Track shadow MMIO value on a per-VM basis arch/x86/include/asm/kvm_host.h | 2 ++ arch/x86/include/asm/vmx.h | 13 ++++++++ arch/x86/kvm/Kconfig | 13 ++++++++ arch/x86/kvm/mmu/mmu.c | 21 ++++++++----- arch/x86/kvm/mmu/paging_tmpl.h | 14 ++++----- arch/x86/kvm/mmu/spte.c | 24 ++++++++------- arch/x86/kvm/mmu/spte.h | 24 ++++++++++++--- arch/x86/kvm/mmu/tdp_mmu.c | 18 +++++------ arch/x86/kvm/vmx/vmcs.h | 5 ++++ arch/x86/kvm/vmx/vmx.c | 53 ++++++++++++++++++++++++++++++++- arch/x86/kvm/vmx/vmx.h | 6 +++- include/linux/kvm_types.h | 1 + virt/kvm/kvm_main.c | 16 ++++++++-- 13 files changed, 167 insertions(+), 43 deletions(-) -- 2.43.0