Received-SPF: pass (google.com: domain of linux-kernel+bounces-172003-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) client-ip=147.75.48.161;
From: Frank Li <Frank.Li@nxp.com>
Date: Tue, 07 May 2024 14:45:43 -0400
Subject: [PATCH v4 05/12] PCI: imx6: Simplify switch-case logic by involve
 core_reset callback
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: 7bit
Message-Id: <20240507-pci2_upstream-v4-5-e8c80d874057@nxp.com>
References: <20240507-pci2_upstream-v4-0-e8c80d874057@nxp.com>
In-Reply-To: <20240507-pci2_upstream-v4-0-e8c80d874057@nxp.com>
To: Richard Zhu <hongxing.zhu@nxp.com>, 
 Lucas Stach <l.stach@pengutronix.de>, 
 Lorenzo Pieralisi <lpieralisi@kernel.org>, 
 =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= <kw@linux.com>, 
 Rob Herring <robh@kernel.org>, Bjorn Helgaas <bhelgaas@google.com>, 
 Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, 
 Pengutronix Kernel Team <kernel@pengutronix.de>, 
 Fabio Estevam <festevam@gmail.com>, NXP Linux Team <linux-imx@nxp.com>, 
 Philipp Zabel <p.zabel@pengutronix.de>, Liam Girdwood <lgirdwood@gmail.com>, 
 Mark Brown <broonie@kernel.org>, 
 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>, 
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, 
 Conor Dooley <conor+dt@kernel.org>
Cc: linux-pci@vger.kernel.org, imx@lists.linux.dev, 
 linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, 
 bpf@vger.kernel.org, devicetree@vger.kernel.org, 
 Frank Li <Frank.Li@nxp.com>
Precedence: bulk
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0:
	=?utf-8?B?L1hwUDh4MXV2TzZNWW5naW5JVURjOEU4OGswNS8rZFlzUExteVpRZTZuc0dE?=
 =?utf-8?B?V2NpTlJPa1ZZM1FNeUpkaS9yWm52TWFYTG0yME1UVUNzdGt1V2xQamM3dnFT?=
 =?utf-8?B?M3JaOHVGMUpOSDFJTXZ3aVhIRytLM0EzVUFtWGM0VFB5TFhrZE9BdzZxQVZx?=
 =?utf-8?B?RkVGbysrWVlwd0l6aTFuV04vMUlCOEwyM2hpczlNeEtVSWpURzd4eTVhVTVt?=
 =?utf-8?B?eDVPT3VDRWcvYUIvZFhiOXg2NU0wSkI2dnZBV0FPbUkxZ1BFd3RRRlY4Z3JZ?=
 =?utf-8?B?MWszdCtxakJ1bGg0TlFSVUh0cWc5ZmFrSzA0bjMxcHpSdXFVbVA4RFRtTEtv?=
 =?utf-8?B?VE52dFJHZThoWHVEbTBKcS9sUGk2RDVhcVhqV2lzVDBrYmU5cVMvOVBaVlly?=
 =?utf-8?B?aGt4QUQvcG9GZndSdzY2aDc5eEVuYmZVcUNNSzMxSERnL1Y4M0xRSlpudUt0?=
 =?utf-8?B?UENFZ1ArMUNSc1J3U3FzeHRNVHdOMTdIREpXdGoyM2hLQ21PdkJDOG9MSVlq?=
 =?utf-8?B?cVc0U0R4ZTdyNkZmSzNvZGhVQ09tdHN2MFo0ZGJ1QUhKZnNIcHB1dUJMUnQ3?=
 =?utf-8?B?LzhoeFQxSjB1a2RtODFERG1IV09NS1RDMkxjaWQ4eUcwUG1YYkhXRDlrb0F5?=
 =?utf-8?B?RFh0YmF3VS94QnZJbWVrOWZBR0lxVXZwS2E0QlkvWHBUbFM1QlNUY3crdEtP?=
 =?utf-8?B?YnFiMkFBZm1HZFdaZnFoRVpXaDB4ckNWNWRRbzltZTI0WjVRZ1hlVm1RTURX?=
 =?utf-8?B?c3BOWXMrODFvRFV3V2orNmVJWlFVMTNlcVovNklxUFNSaHZ5NDQ5QnZpUDIw?=
 =?utf-8?B?U3poSXF5bVhiYloxTlVYckZJRWVsbmhDb3hrb2ovcjFEVEp6RytBTysrV0hQ?=
 =?utf-8?B?bGpBYmxLMklkUTk3c0VlRFhZNDRTaU9aVTRKUnJwWnF5UDN6RXdPUWxCSDJZ?=
 =?utf-8?B?d3hyVzgrZTZYMzlleXA1T0VVWUZuU0JiVzZtbERGU0JwWDA3UU9qY3NBODNi?=
 =?utf-8?B?V2gvbzFRL0thR3VoV25Palo4QXBnaGZHeTJLYjNiWURyaXhVVzVxZmZsWEMy?=
 =?utf-8?B?QU0wMmR4ZGt3MGFPYzJrU3pib0FLbVd4UkNYOGx2Qzl4ZmlVKy9ZWXlYYlZn?=
 =?utf-8?B?Vyt0MjNWZWFvazhkUFhURmU1ekl0SDUyQTI1VjZsZDFxYnUwYWcwWEI2ME5j?=
 =?utf-8?B?czZ3ZERxUVhoUHhGMmNNVTdlcEk5a01oc0ZtM0ErSXQwSUxwZGFjQU9uZEpa?=
 =?utf-8?B?cGhiRVo3cTRIbEhocVRialBMcmlyQmZsa0tDTEJEKzhIbWZvWllIK1hVSTlw?=
 =?utf-8?B?c1R6LzliZTl1aWlVbU9IYkJHdTNuK3pmUGJVNW5rcW42b3FPbGN1K1dQaWlw?=
 =?utf-8?B?R1RiRlR1eGd6U2dBZEV5OWVuNkl3RkhGRGNNZXJ2NG0zR050d3NjdEpMcGYv?=
 =?utf-8?B?YmVYSkhxaFBzb0JHKzVlSTVXclJZTXdNbHVidTI5S1ZwMUV2aXRIcjEvSHdu?=
 =?utf-8?B?eEl5RUt4QzBpdmhKRko3WGttaHJyTzNUOE9JZFhFdjZMWU5BTEdxNTB3T2xO?=
 =?utf-8?B?bGxSNXYyMkV0NDFWOFpBa1VIdk5TVzEveGlWaXBRSFhyMWdxUGs0Q3lCOEg4?=
 =?utf-8?B?RmxzMEJGenhqanJsZlJOM0hsWUpYS2NFbjdpMjZZRjF6K3VDNVRqaEJCZFVk?=
 =?utf-8?B?a3g2UUUyMFJhbnV1NlVJU2wycDNkb2tvU3JTK1lDYWI5OXJMVTE5dEMvK3Ev?=
 =?utf-8?B?L3dPQktFendydnVLQ09QaTQwSHpzZU1RRHpJQzI4MXRGZTd3WHFacm9iY1Bp?=
 =?utf-8?B?Y3E3cDJFbW5aM1FDOGNDVzdDUy9tN1gxUTRUaHp2V3M1c2hCc0hNbW1LclU3?=
 =?utf-8?B?R3o3ZDFJNG4xUWdJZDB6L2w0aHRuU2UrZWlORjBRMHJ6azloWW8rOE4xenMx?=
 =?utf-8?B?ZHJ6MWdXV1J0TnFwNXRERzlqZXA3ZVNzKzMxNUdSMGtCMzB3NzhJcC9pVFpo?=
 =?utf-8?B?Z3V3aDZnWWs4LzNZamhPNDJJcW15R0NPRTVnR1c5QjZSOGtGQnY2NExkTTVz?=
 =?utf-8?B?WHFkdS93VlZnYThzeklyTXpsM0JBZ3haWFYrd1hOZ3ZTZ0dVaEdlNDQ2RDVM?=
 =?utf-8?Q?tqx+4JnWUwjg43WGyMGnHUcig?=
X-OriginatorOrg: nxp.com
X-MS-Exchange-CrossTenant-Network-Message-Id: c0271a42-03b3-4e7e-a494-08dc6ec60d0f
X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 May 2024 18:46:48.8087
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: KszmCK5zHC0m2Q4kON4cTUQDZIzGZsS46RJEd+26QsyJ++wbNQaLlOBUmvv9dUcKGVniQ5Hf7ptSsEifRBgRyg==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR04MB9636

Instead of using the switch case statement to assert/dassert the core reset
handled by this driver itself, let's introduce a new callback core_reset()
and define it for platforms that require it. This simplifies the code.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 134 ++++++++++++++++++----------------
 1 file changed, 71 insertions(+), 63 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index cf1b487b3f625..7396f0d51119a 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -104,6 +104,7 @@ struct imx_pcie_drvdata {
 	const struct pci_epc_features *epc_features;
 	int (*init_phy)(struct imx_pcie *pcie);
 	int (*set_ref_clk)(struct imx_pcie *pcie, bool enable);
+	int (*core_reset)(struct imx_pcie *pcie, bool assert);
 };
 
 struct imx_pcie {
@@ -672,35 +673,75 @@ static void imx_pcie_clk_disable(struct imx_pcie *imx_pcie)
 	clk_bulk_disable_unprepare(imx_pcie->drvdata->clks_cnt, imx_pcie->clks);
 }
 
+static int imx6sx_pcie_core_reset(struct imx_pcie *imx_pcie, bool assert)
+{
+	if (assert)
+		regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,
+				IMX6SX_GPR12_PCIE_TEST_POWERDOWN);
+
+	/* Force PCIe PHY reset */
+	regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR5, IMX6SX_GPR5_PCIE_BTNRST_RESET,
+			   assert ? IMX6SX_GPR5_PCIE_BTNRST_RESET : 0);
+	return 0;
+}
+
+static int imx6qp_pcie_core_reset(struct imx_pcie *imx_pcie, bool assert)
+{
+	regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_SW_RST,
+			   assert ? IMX6Q_GPR1_PCIE_SW_RST : 0);
+	if (!assert)
+		usleep_range(200, 500);
+
+	return 0;
+}
+
+static int imx6q_pcie_core_reset(struct imx_pcie *imx_pcie, bool assert)
+{
+	if (!assert)
+		return 0;
+
+	regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_TEST_PD);
+	regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_REF_CLK_EN);
+
+	return 0;
+}
+
+static int imx7d_pcie_core_reset(struct imx_pcie *imx_pcie, bool assert)
+{
+	struct dw_pcie *pci = imx_pcie->pci;
+	struct device *dev = pci->dev;
+
+	if (assert)
+		return 0;
+
+	/*
+	 * Workaround for ERR010728, failure of PCI-e PLL VCO to
+	 * oscillate, especially when cold. This turns off "Duty-cycle
+	 * Corrector" and other mysterious undocumented things.
+	 */
+
+	if (likely(imx_pcie->phy_base)) {
+		/* De-assert DCC_FB_EN */
+		writel(PCIE_PHY_CMN_REG4_DCC_FB_EN, imx_pcie->phy_base + PCIE_PHY_CMN_REG4);
+		/* Assert RX_EQS and RX_EQS_SEL */
+		writel(PCIE_PHY_CMN_REG24_RX_EQ_SEL | PCIE_PHY_CMN_REG24_RX_EQ,
+		       imx_pcie->phy_base + PCIE_PHY_CMN_REG24);
+		/* Assert ATT_MODE */
+		writel(PCIE_PHY_CMN_REG26_ATT_MODE, imx_pcie->phy_base + PCIE_PHY_CMN_REG26);
+	} else {
+		dev_warn(dev, "Unable to apply ERR010728 workaround. DT missing fsl,imx7d-pcie-phy phandle ?\n");
+	}
+	imx7d_pcie_wait_for_phy_pll_lock(imx_pcie);
+	return 0;
+}
+
 static void imx_pcie_assert_core_reset(struct imx_pcie *imx_pcie)
 {
 	reset_control_assert(imx_pcie->pciephy_reset);
 	reset_control_assert(imx_pcie->apps_reset);
 
-	switch (imx_pcie->drvdata->variant) {
-	case IMX6SX:
-		regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,
-				   IMX6SX_GPR12_PCIE_TEST_POWERDOWN,
-				   IMX6SX_GPR12_PCIE_TEST_POWERDOWN);
-		/* Force PCIe PHY reset */
-		regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR5,
-				   IMX6SX_GPR5_PCIE_BTNRST_RESET,
-				   IMX6SX_GPR5_PCIE_BTNRST_RESET);
-		break;
-	case IMX6QP:
-		regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
-				   IMX6Q_GPR1_PCIE_SW_RST,
-				   IMX6Q_GPR1_PCIE_SW_RST);
-		break;
-	case IMX6Q:
-		regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
-				   IMX6Q_GPR1_PCIE_TEST_PD, 1 << 18);
-		regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
-				   IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16);
-		break;
-	default:
-		break;
-	}
+	if (imx_pcie->drvdata->core_reset)
+		imx_pcie->drvdata->core_reset(imx_pcie, true);
 
 	/* Some boards don't have PCIe reset GPIO. */
 	if (gpio_is_valid(imx_pcie->reset_gpio))
@@ -710,47 +751,10 @@ static void imx_pcie_assert_core_reset(struct imx_pcie *imx_pcie)
 
 static int imx_pcie_deassert_core_reset(struct imx_pcie *imx_pcie)
 {
-	struct dw_pcie *pci = imx_pcie->pci;
-	struct device *dev = pci->dev;
-
 	reset_control_deassert(imx_pcie->pciephy_reset);
 
-	switch (imx_pcie->drvdata->variant) {
-	case IMX7D:
-		/* Workaround for ERR010728, failure of PCI-e PLL VCO to
-		 * oscillate, especially when cold.  This turns off "Duty-cycle
-		 * Corrector" and other mysterious undocumented things.
-		 */
-		if (likely(imx_pcie->phy_base)) {
-			/* De-assert DCC_FB_EN */
-			writel(PCIE_PHY_CMN_REG4_DCC_FB_EN,
-			       imx_pcie->phy_base + PCIE_PHY_CMN_REG4);
-			/* Assert RX_EQS and RX_EQS_SEL */
-			writel(PCIE_PHY_CMN_REG24_RX_EQ_SEL
-				| PCIE_PHY_CMN_REG24_RX_EQ,
-			       imx_pcie->phy_base + PCIE_PHY_CMN_REG24);
-			/* Assert ATT_MODE */
-			writel(PCIE_PHY_CMN_REG26_ATT_MODE,
-			       imx_pcie->phy_base + PCIE_PHY_CMN_REG26);
-		} else {
-			dev_warn(dev, "Unable to apply ERR010728 workaround. DT missing fsl,imx7d-pcie-phy phandle ?\n");
-		}
-
-		imx7d_pcie_wait_for_phy_pll_lock(imx_pcie);
-		break;
-	case IMX6SX:
-		regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR5,
-				   IMX6SX_GPR5_PCIE_BTNRST_RESET, 0);
-		break;
-	case IMX6QP:
-		regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
-				   IMX6Q_GPR1_PCIE_SW_RST, 0);
-
-		usleep_range(200, 500);
-		break;
-	default:
-		break;
-	}
+	if (imx_pcie->drvdata->core_reset)
+		imx_pcie->drvdata->core_reset(imx_pcie, false);
 
 	/* Some boards don't have PCIe reset GPIO. */
 	if (gpio_is_valid(imx_pcie->reset_gpio)) {
@@ -1448,6 +1452,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
 		.mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
 		.init_phy = imx_pcie_init_phy,
 		.set_ref_clk = imx6q_pcie_set_ref_clk,
+		.core_reset = imx6q_pcie_core_reset,
 	},
 	[IMX6SX] = {
 		.variant = IMX6SX,
@@ -1463,6 +1468,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
 		.mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
 		.init_phy = imx6sx_pcie_init_phy,
 		.set_ref_clk = imx6sx_pcie_set_ref_clk,
+		.core_reset = imx6sx_pcie_core_reset,
 	},
 	[IMX6QP] = {
 		.variant = IMX6QP,
@@ -1479,6 +1485,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
 		.mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
 		.init_phy = imx_pcie_init_phy,
 		.set_ref_clk = imx6q_pcie_set_ref_clk,
+		.core_reset = imx6qp_pcie_core_reset,
 	},
 	[IMX7D] = {
 		.variant = IMX7D,
@@ -1492,6 +1499,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
 		.mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
 		.init_phy = imx7d_pcie_init_phy,
 		.set_ref_clk = imx7d_pcie_set_ref_clk,
+		.core_reset = imx7d_pcie_core_reset,
 	},
 	[IMX8MQ] = {
 		.variant = IMX8MQ,

-- 
2.34.1