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Tue, 07 May 2024 13:39:16 -0700 (PDT) Date: Tue, 7 May 2024 13:39:14 -0700 From: Charlie Jenkins To: Jessica Clarke Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Song Liu , Xi Wang , =?iso-8859-1?Q?Bj=F6rn_T=F6pel?= , =?iso-8859-1?Q?Cl=E9ment_L=E9ger?= , linux-riscv , LKML Subject: Re: [PATCH 4/8] riscv: Add PLATFORM_MAY_SUPPORT_RISCV_ISA_SVPBMT Kconfig option Message-ID: References: <20240506-compile_kernel_with_extensions-v1-0-5c25c134c097@rivosinc.com> <20240506-compile_kernel_with_extensions-v1-4-5c25c134c097@rivosinc.com> <11F5B269-05DD-448E-9F85-878E84A5654F@jrtc27.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <11F5B269-05DD-448E-9F85-878E84A5654F@jrtc27.com> On Tue, May 07, 2024 at 06:40:52AM +0100, Jessica Clarke wrote: > On 7 May 2024, at 02:40, Charlie Jenkins wrote: > > > > Svpbmt would not benefit from having PLATFORM_SUPPORTS_RISCV_ISA_SVPBMT > > so just rename RISCV_ISA_SVPBMT to PLATFORM_MAY_SUPPORT_RISCV_ISA_SVPBMT > > and move the definition to Kconfig.isa. > > > > Signed-off-by: Charlie Jenkins > > --- > > arch/riscv/Kconfig | 17 ----------------- > > arch/riscv/Kconfig.isa | 17 +++++++++++++++++ > > 2 files changed, 17 insertions(+), 17 deletions(-) > > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > > index 9c3a4347953b..22303a3ab59e 100644 > > --- a/arch/riscv/Kconfig > > +++ b/arch/riscv/Kconfig > > @@ -484,23 +484,6 @@ config RISCV_ALTERNATIVE_EARLY > > help > > Allows early patching of the kernel for special errata > > > > -config RISCV_ISA_SVPBMT > > - bool "Svpbmt extension support for supervisor mode page-based memory types" > > - depends on 64BIT && MMU > > - depends on RISCV_ALTERNATIVE > > - default y > > - help > > - Add support for the Svpbmt ISA-extension (Supervisor-mode: > > - page-based memory types) in the kernel when it is detected at boot. > > - > > - The memory type for a page contains a combination of attributes > > - that indicate the cacheability, idempotency, and ordering > > - properties for access to that page. > > - > > - The Svpbmt extension is only available on 64-bit cpus. > > - > > - If you don't know what to do here, say Y. > > - > > config TOOLCHAIN_HAS_ZBB > > bool > > default y > > diff --git a/arch/riscv/Kconfig.isa b/arch/riscv/Kconfig.isa > > index 37585bcd763e..50e217dc5719 100644 > > --- a/arch/riscv/Kconfig.isa > > +++ b/arch/riscv/Kconfig.isa > > @@ -168,3 +168,20 @@ config PLATFORM_SUPPORTS_RISCV_ISA_SVNAPOT > > not support Svnapot. > > > > endchoice > > + > > +config RISCV_ISA_SVPBMT > > Hi Charlie, > Despite the subject and body you haven’t renamed it in this patch? I didn't do a good job at explaining exactly what's happening here. The config option "PLATFORM_MAY_SUPPORT_RISCV_ISA_SVPBMT" most closely follows the semantics of what "RISCV_ISA_SVPBMT" previously was. This patch changes "RISCV_ISA_SVPBMT" to mean that either PLATFORM_MAY_SUPPORT_RISCV_ISA_SVPBMT or PLATFORM_SUPPORTS_RISCV_ISA_SVNAPOT was selected. - Charlie > > Jess > > > + bool "Svpbmt extension support for supervisor mode page-based memory types" > > + depends on 64BIT && MMU > > + depends on RISCV_ALTERNATIVE > > + default y > > + help > > + Add support for the Svpbmt ISA-extension (Supervisor-mode: > > + page-based memory types) in the kernel when it is detected at boot. > > + > > + The memory type for a page contains a combination of attributes > > + that indicate the cacheability, idempotency, and ordering > > + properties for access to that page. > > + > > + The Svpbmt extension is only available on 64-bit cpus. > > + > > + If you don't know what to do here, say Y. > > > > -- > > 2.44.0 > > > > > > _______________________________________________ > > linux-riscv mailing list > > linux-riscv@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-riscv >