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Subject: Re: [PATCH] clk: qcom: gcc-sm8450: set OPS_PARENT_ENABLE on gcc_sdcc2_apps_clk_src
From: Stephen Boyd <sboyd@kernel.org>
Cc: Marijn Suijten <marijn.suijten@somainline.org>, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Michael Turquette <mturquette@baylibre.com>, Vinod Koul <vkoul@kernel.org>
Date: Tue, 07 May 2024 14:52:07 -0700
User-Agent: alot/0.10

Quoting Konrad Dybcio (2024-05-07 14:17:01)
>=20
>=20
> On 5/7/24 22:28, Stephen Boyd wrote:
> >>
> >=20
> > Can you share your patch that prints the message? What bit are you
> > checking in the hardware to determine if the RCG is enabled? Do you also
> > print the enable count in software?
>=20
> I already reset-ed the tree state, but I added something like
>=20
> if (rcg->cmd_rcgr =3D=3D the one in the declaration)
>         pr_err("gcc_sdcc2_apps_clk_src is %s\n", clk_is_enabled(hw) ? "EN=
ABLED" : "DISABLED");
>=20
> to drivers/clk/qcom/clk-rcg2.c : __clk_rcg2_set_rate()
>=20
>=20

Ok. You're reading the software state because there isn't an is_enabled
clk_op for RCGs. Can you also read the CMD register (0x0 offset from
base) and check for CMD_ROOT_EN (bit 1) being set? That's what I mean
when I'm talking about the RCG being enabled in hardware. Similarly,
read CMD_ROOT_OFF (bit 31) to see if some child branch of the RCG is
enabled at this time.