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From: David Brownell <david-b@pacbell.net>
To: Haavard Skinnemoen <hskinnemoen@atmel.com>
Subject: Re: [RFC v2 2/5] dmaengine: Add slave DMA interface
Date: Tue, 29 Jan 2008 23:30:05 -0800
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Cc: Dan Williams <dan.j.williams@intel.com>, linux-kernel@vger.kernel.org,
       Shannon Nelson <shannon.nelson@intel.com>, kernel@avr32linux.org,
       "Francis Moreau" <francis.moro@gmail.com>,
       "Paul Mundt" <lethal@linux-sh.org>,
       "Vladimir A. Barinov" <vbarinov@ru.mvista.com>,
       Pierre Ossman <drzeus-list@drzeus.cx>
References: <1201630213-31900-1-git-send-email-hskinnemoen@atmel.com> <1201630213-31900-2-git-send-email-hskinnemoen@atmel.com> <1201630213-31900-3-git-send-email-hskinnemoen@atmel.com>
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On Tuesday 29 January 2008, Haavard Skinnemoen wrote:
> @@ -297,6 +356,13 @@ struct dma_device {
> ????????struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)(
> ????????????????struct dma_chan *chan);
> ?
> +???????struct dma_slave_descriptor *(*device_prep_slave)(
> +???????????????struct dma_chan *chan, dma_addr_t mem_addr,
> +???????????????enum dma_slave_direction direction,
> +???????????????enum dma_slave_width reg_width,
> +???????????????size_t len, unsigned long flags);

That isn't enough options!  Check out arch/arm/plat-omap/dma.c (and
maybe OMAP5912 DMA docs [1] for not-very-recent specs) as one example.
You'll see more options that drivers need to use, including:

 - DMA priority and arbitration
 - Burst size, packing/unpacking support (for optimized memory access)
 - Multiple DMA quanta (not just reg_width, but also frames and blocks)
 - Multiple synch modes (per element/"width", frame, or block)
 - Multiple addressing modes:   pre-index, post-index, double-index, ...
 - Both descriptor-based and register based transfers
 - ... lots more ...

Example:  USB tends to use one packet per "frame" and have the DMA
request signal mean "give me the next frame".  It's sometimes been
very important to use use the tuning options to avoid some on-chip
race conditions for transfers that cross lots of internal busses and
clock domains, and to have special handling for aborting transfers
and handling "short RX" packets.


I wonder whether a unified programming interface is the right way
to approach peripheral DMA support, given such variability.  The DMAC
from Synopsys that you're working with has some of those options, but
not all of them... and other DMA controllers have their own oddities.

For memcpy() acceleration, sure -- there shouldn't be much scope for
differences.  Source, destination, bytecount ... go!  (Not that it's
anywhere *near* that quick in the current interface.)

For peripheral DMA, maybe it should be a "core plus subclasses"
approach so that platform drivers can make use hardware-specific
knowledge (SOC-specific peripheral drivers using SOC-specific DMA),
sharing core code for dma-memcpy() and DMA channel housekeeping.

- Dave

[1] http://focus.ti.com/docs/prod/folders/print/omap5912.html
    lists spru755c near the bottom; the "System DMA" section.


> +???????void (*device_terminate_all)(struct dma_chan *chan);
> +
> ????????void (*device_dependency_added)(struct dma_chan *chan);
> ????????enum dma_status (*device_is_tx_complete)(struct dma_chan *chan,
> ????????????????????????dma_cookie_t cookie, dma_cookie_t *last,


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