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Tue, 07 May 2024 18:36:49 -0700 (PDT) From: Charlie Jenkins Date: Tue, 07 May 2024 18:36:32 -0700 Subject: [PATCH v2 6/8] riscv: Add PLATFORM_SUPPORTS_RISCV_ISA_ZBA Kconfig option Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240507-compile_kernel_with_extensions-v2-6-722c21c328c6@rivosinc.com> References: <20240507-compile_kernel_with_extensions-v2-0-722c21c328c6@rivosinc.com> In-Reply-To: <20240507-compile_kernel_with_extensions-v2-0-722c21c328c6@rivosinc.com> To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Song Liu , Xi Wang , =?utf-8?q?Bj=C3=B6rn_T=C3=B6pel?= , =?utf-8?q?Cl=C3=A9ment_L=C3=A9ger?= , Jessica Clarke , Andy Chiu Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Charlie Jenkins X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1715132198; l=3295; i=charlie@rivosinc.com; s=20231120; h=from:subject:message-id; bh=Ue5TDLMRl4Jg133jL9t6n44Efl7WVoijxTwvOh6lOb4=; b=VPIFtHfzr8Xor7UIxI0uyPtvmdLuA5naS2Aa3xz4lMr3TZ261O7CupIAtnVu2wEleN1W4S7jL MeRK4vLEM5jDcGk96yhQiSL1n+P1wTsp6mS9ZW8caczG/bll99sxiRn X-Developer-Key: i=charlie@rivosinc.com; a=ed25519; pk=t4RSWpMV1q5lf/NWIeR9z58bcje60/dbtxxmoSfBEcs= Zba can optimize kernel instruction sequences. Add a config option PLATFORM_SUPPORTS_RISCV_ISA_ZBA that allows arbitrary Zba instruction sequences to be emitted by the compiler. The existing "RISCV_ISA_ZBA" option is repurposed to be used to by kernel code to determine if either PLATFORM_MAY_SUPPORT_RISCV_ISA_ZBA or PLATFORM_SUPPORTS_RISCV_ISA_ZBA has been set. Signed-off-by: Charlie Jenkins --- arch/riscv/Kconfig.isa | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++ arch/riscv/Makefile | 1 + 2 files changed, 53 insertions(+) diff --git a/arch/riscv/Kconfig.isa b/arch/riscv/Kconfig.isa index 49bed8c75263..e7f28dc44137 100644 --- a/arch/riscv/Kconfig.isa +++ b/arch/riscv/Kconfig.isa @@ -186,6 +186,58 @@ config PLATFORM_MAY_SUPPORT_RISCV_ISA_SVPBMT If you don't know what to do here, say Y. + +config TOOLCHAIN_HAS_ZBA + bool + default y + depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zba) + depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zba) + depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900 + depends on AS_HAS_OPTION_ARCH + +config RISCV_ISA_ZBA + bool + +choice + prompt "Zba extension for address generation instructions support" + default PLATFORM_MAY_SUPPORT_RISCV_ISA_ZBA + help + This selects the level of support for Zba instructions to be + built into the Linux Kernel. This does not impact whether Zba + instructions are allowed to be emitted by user-space code. + + The Zba extension provides instructions to accelerate a number + of address generation instruction sequences. + +config PROHIBIT_RISCV_ISA_ZBA + bool "Prohibit Zba instruction sequences" + depends on NONPORTABLE + help + Regardless of if the platform supports Zba instructions, + prohibit the kernel from emitting Zba instructions. + +config PLATFORM_MAY_SUPPORT_RISCV_ISA_ZBA + bool "Allow Zba instruction sequences if supported" + depends on TOOLCHAIN_HAS_ZBB + depends on RISCV_ALTERNATIVE + select RISCV_ISA_ZBA + help + Add support for enabling optimisations in the kernel when the + Zba extension is detected at boot. + +config PLATFORM_SUPPORTS_RISCV_ISA_ZBA + bool "Emit Zba instructions when building Linux" + depends on TOOLCHAIN_HAS_ZBB + depends on NONPORTABLE + select RISCV_ISA_ZBA + help + Adds "zba" to the ISA subsets that the toolchain is allowed to emit + when building Linux, which results in Zba instructions in the + Linux binary. This option produces a kernel that will not run on + systems that do not support the Zba extension. + +endchoice + config TOOLCHAIN_HAS_ZBB bool default y diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 6b0c3a782f99..c8ec38b9880a 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -66,6 +66,7 @@ riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd riscv-march-$(CONFIG_PLATFORM_SUPPORTS_RISCV_ISA_C) := $(riscv-march-y)c +riscv-march-$(CONFIG_PLATFORM_SUPPORTS_RISCV_ISA_ZBA) := $(riscv-march-y)_zba riscv-march-$(CONFIG_PLATFORM_SUPPORTS_RISCV_ISA_ZBB) := $(riscv-march-y)_zbb ifdef CONFIG_TOOLCHAIN_NEEDS_OLD_ISA_SPEC -- 2.44.0