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From: =?UTF-8?q?Steffen=20B=C3=A4tz?= <steffen@innosonix.de>
To: 
Cc: =?UTF-8?q?Steffen=20B=C3=A4tz?= <steffen@innosonix.de>,
	Andrew Lunn <andrew@lunn.ch>,
	Fabio Estevam <festevam@gmail.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Vladimir Oltean <olteanv@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>,
	Paolo Abeni <pabeni@redhat.com>,
	Russell King <linux@armlinux.org.uk>,
	"Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>,
	netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v2 net 1/2] net: dsa: mv88e6xxx: add phylink_get_caps for the mv88e6320/21 family
Date: Wed,  8 May 2024 09:29:43 +0200
Message-Id: <20240508072944.54880-2-steffen@innosonix.de>
In-Reply-To: <20240508072944.54880-1-steffen@innosonix.de>
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As of commit de5c9bf40c45 ("net: phylink: require supported_interfaces to
be filled")
Marvell 88e6320/21 switches fail to be probed:

..
mv88e6085 30be0000.ethernet-1:00: phylink: error: empty supported_interface=
s
error creating PHYLINK: -22
..

The problem stems from the use of mv88e6185_phylink_get_caps() to get
the device capabilities.=20
Since there are serdes only ports 0/1 included, create a new dedicated=20
phylink_get_caps for the 6320 and 6321 to properly support their=20
set of capabilities.

Fixes: de5c9bf40c45 ("net: phylink: require supported_interfaces to be fill=
ed")

Signed-off-by: Steffen B=C3=A4tz <steffen@innosonix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

Changes since v1:
- Removed unused variables.
- Collected Reviewed-by tags from Andrew and Fabio
---
 drivers/net/dsa/mv88e6xxx/chip.c | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/c=
hip.c
index 32416d8802ca..bd58190853c7 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -697,6 +697,18 @@ static void mv88e6352_phylink_get_caps(struct mv88e6xx=
x_chip *chip, int port,
 	}
 }
=20
+static void mv88e632x_phylink_get_caps(struct mv88e6xxx_chip *chip, int po=
rt,
+				       struct phylink_config *config)
+{
+	unsigned long *supported =3D config->supported_interfaces;
+
+	/* Translate the default cmode */
+	mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported);
+
+	config->mac_capabilities =3D MAC_SYM_PAUSE | MAC_10 | MAC_100 |
+				   MAC_1000FD;
+}
+
 static void mv88e6341_phylink_get_caps(struct mv88e6xxx_chip *chip, int po=
rt,
 				       struct phylink_config *config)
 {
@@ -5090,7 +5102,7 @@ static const struct mv88e6xxx_ops mv88e6320_ops =3D {
 	.gpio_ops =3D &mv88e6352_gpio_ops,
 	.avb_ops =3D &mv88e6352_avb_ops,
 	.ptp_ops =3D &mv88e6352_ptp_ops,
-	.phylink_get_caps =3D mv88e6185_phylink_get_caps,
+	.phylink_get_caps =3D mv88e632x_phylink_get_caps,
 };
=20
 static const struct mv88e6xxx_ops mv88e6321_ops =3D {
@@ -5136,7 +5148,7 @@ static const struct mv88e6xxx_ops mv88e6321_ops =3D {
 	.gpio_ops =3D &mv88e6352_gpio_ops,
 	.avb_ops =3D &mv88e6352_avb_ops,
 	.ptp_ops =3D &mv88e6352_ptp_ops,
-	.phylink_get_caps =3D mv88e6185_phylink_get_caps,
+	.phylink_get_caps =3D mv88e632x_phylink_get_caps,
 };
=20
 static const struct mv88e6xxx_ops mv88e6341_ops =3D {
--=20
2.34.1


--=20


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--=20