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Wed, 08 May 2024 09:39:05 -0700 (PDT) Message-ID: Date: Wed, 8 May 2024 17:39:03 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] spi: microchip-core-qspi: fix setting spi bus clock rate To: Conor Dooley , linux-spi@vger.kernel.org Cc: Conor Dooley , stable@vger.kernel.org, Daire McNamara , Naga Sureshkumar Relli , Mark Brown , linux-kernel@vger.kernel.org References: <20240508-fox-unpiloted-b97e1535627b@spud> Content-Language: en-US From: Tudor Ambarus In-Reply-To: <20240508-fox-unpiloted-b97e1535627b@spud> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 5/8/24 16:46, Conor Dooley wrote: > From: Conor Dooley > > Before ORing the new clock rate with the control register value read > from the hardware, the existing clock rate needs to be masked off as > otherwise the existing value will interfere with the new one. > > CC: stable@vger.kernel.org > Fixes: 8596124c4c1b ("spi: microchip-core-qspi: Add support for microchip fpga qspi controllers") > Signed-off-by: Conor Dooley Reviewed-by: Tudor Ambarus > --- > CC: Conor Dooley > CC: Daire McNamara > CC: Naga Sureshkumar Relli > CC: Mark Brown > CC: linux-spi@vger.kernel.org > CC: linux-kernel@vger.kernel.org > --- > drivers/spi/spi-microchip-core-qspi.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/spi/spi-microchip-core-qspi.c b/drivers/spi/spi-microchip-core-qspi.c > index 03d125a71fd9..09f16471c537 100644 > --- a/drivers/spi/spi-microchip-core-qspi.c > +++ b/drivers/spi/spi-microchip-core-qspi.c > @@ -283,6 +283,7 @@ static int mchp_coreqspi_setup_clock(struct mchp_coreqspi *qspi, struct spi_devi > } > > control = readl_relaxed(qspi->regs + REG_CONTROL); > + control &= ~CONTROL_CLKRATE_MASK; > control |= baud_rate_val << CONTROL_CLKRATE_SHIFT; > writel_relaxed(control, qspi->regs + REG_CONTROL); > control = readl_relaxed(qspi->regs + REG_CONTROL);