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[93.34.90.105]) by smtp.googlemail.com with ESMTPSA id fk12-20020a05600c0ccc00b0041c130520fbsm2921555wmb.46.2024.05.08.10.07.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 May 2024 10:07:36 -0700 (PDT) From: Christian Marangi To: Hauke Mehrtens , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Thomas Bogendoerfer , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Broadcom internal kernel review list , Christian Marangi , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 0/4] mips: bmips: improve handling of RAC and CBR addr Date: Wed, 8 May 2024 19:07:16 +0200 Message-ID: <20240508170721.3023-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hi, this simple series improve handling of RAC and CBR address and try to upstream these simple patch we have in OpenWrt for a while. The first patch fix a straight kernel panic where some Bootloader might enable RAC but misconfigure the CBR address. The current logic only check if RAC is enabled but doesn't verify if the CBR address is usable. The DMA sync function cause a kernel panic for invalid write. (as CBR is 0 or something like 0xa) The second is preparation for making the CBR address configurable in DT. Since this address doesn't change, we can cache it and reference it with a local variable instead of calling the register to access the value. The 4th patch make it configurable with 2 DT property, one to actually set the reg and the other to force set it. The first property is used when CBR is set to 0. The second property is to force it if the Bootloader sets it to something wrong. If the CBR value is not 0 and is not forced with the second property a WARN is printed and the DT value is ignored. The 4th patch enable RAC on BMIPS4350. These has been tested on BCM6358 (HG556a) and BCM6368 (VH4032N) and reported correct functionality. Changes v3: - Drop broken-cbr-reg property - Fix anyOf+const with enum Changes v2: - Prefix brcm vendor in the added property - Drop last patch (cpu switch from DMA sync) - Validate CBR addr from DT to be outside DRAM - Reduce indentation in DT CBR check - Reduce delta and use local variable for CBR where possible - Fix and improve typo and spelling mistake - Use 0xf instead of 0xa for BCM6358 RAC enable Christian Marangi (3): mips: bmips: rework and cache CBR addr handling dt-bindings: mips: brcm: Document brcm,bmips-cbr-reg property mips: bmips: setup: make CBR address configurable Daniel González Cabanelas (1): mips: bmips: enable RAC on BMIPS4350 .../devicetree/bindings/mips/brcm/soc.yaml | 23 +++++++++++++ arch/mips/bmips/dma.c | 2 +- arch/mips/bmips/setup.c | 34 +++++++++++++++++-- arch/mips/include/asm/bmips.h | 1 + arch/mips/kernel/smp-bmips.c | 21 ++++++++++-- 5 files changed, 76 insertions(+), 5 deletions(-) -- 2.43.0