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Thu, 9 May 2024 16:39:49 +0800 X-Barracuda-RBL-Trusted-Forwarder: 10.28.252.163 Message-ID: X-Barracuda-RBL-Trusted-Forwarder: 192.168.1.204 Date: Thu, 9 May 2024 16:39:38 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 0/3] Parse the HEST PCIe AER and set to relevant registers To: Bjorn Helgaas X-ASG-Orig-Subj: Re: [PATCH v2 0/3] Parse the HEST PCIe AER and set to relevant registers CC: , , , , , , , , , , , , , , References: <20240508220436.GA1789788@bhelgaas> From: LeoLiu-oc In-Reply-To: <20240508220436.GA1789788@bhelgaas> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: ZXSHCAS2.zhaoxin.com (10.28.252.162) To ZXBJMBX03.zhaoxin.com (10.29.252.7) X-Barracuda-Connect: ZXSHMBX1.zhaoxin.com[10.28.252.163] X-Barracuda-Start-Time: 1715243991 X-Barracuda-Encrypted: ECDHE-RSA-AES128-GCM-SHA256 X-Barracuda-URL: https://10.28.252.35:4443/cgi-mod/mark.cgi X-Virus-Scanned: by bsmtpd at zhaoxin.com X-Barracuda-Scan-Msg-Size: 2313 X-Barracuda-BRTS-Status: 0 X-Barracuda-Bayes: INNOCENT GLOBAL 0.0000 1.0000 -2.0210 X-Barracuda-Spam-Score: -2.02 X-Barracuda-Spam-Status: No, SCORE=-2.02 using global scores of TAG_LEVEL=1000.0 QUARANTINE_LEVEL=1000.0 KILL_LEVEL=9.0 tests= X-Barracuda-Spam-Report: Code version 3.2, rules version 3.2.3.124625 Rule breakdown below pts rule name description ---- ---------------------- -------------------------------------------------- 在 2024/5/9 6:04, Bjorn Helgaas 写道: > > > [这封邮件来自外部发件人 谨防风险] > > On Mon, Dec 18, 2023 at 11:04:27AM +0800, LeoLiu-oc wrote: >> From: LeoLiuoc >> >> According to the Section 18.3.2.4, 18.3.2.5 and 18.3.2.6 in ACPI SPEC >> r6.5, the register value form HEST PCI Express AER Structure should be >> written to relevant PCIe Device's AER Capabilities.So the purpose of the >> patch set is to extract register value from HEST PCI Express AER >> structures and program them into PCIe Device's AER registers. Refer to the >> ACPI SPEC r6.5 for the more detailed description. This patch is an >> effective supplement to _HPP/_HPX method when the Firmware does not >> support the _HPP/_HPX method and can be specially configured for the AER >> register of the specific device. >> >> --- >> >> v1->v2: >> - Move the definition of structure "hest_parse_aer_info" to file apei.h. > > Just noticed that this removes the ACPICA header dependency problem > that Rafael pointed out. This also applies (with minor offsets) to > v6.9-rc1, so it's not very stale. We're almost to the v6.9 final > release, so when v6.10-rc1 is tagged, can you rebase to that and > repost this? > Thank you very much for your review. I will make a new patch version based on the kernel v6.10-rc1 according to your suggestion. > I assume you have a platform that uses this. It would be good to > mention that in the commit log of patches 1 and 3 so we have some idea > of where it's useful and where changes need to be tested. > Okay, I will add hardware suitability information for this patch to the commit log. Yours sincerely Leoliu-oc >> LeoLiuoc (3): >> ACPI/APEI: Add hest_parse_pcie_aer() >> PCI: Add AER bits #defines for PCIe to PCI/PCI-X Bridge >> PCI/ACPI: Add pci_acpi_program_hest_aer_params() >> >> drivers/acpi/apei/hest.c | 69 +++++++++++++++++++++++- >> drivers/pci/pci-acpi.c | 98 +++++++++++++++++++++++++++++++++++ >> drivers/pci/pci.h | 9 ++++ >> drivers/pci/probe.c | 1 + >> include/acpi/apei.h | 17 ++++++ >> include/uapi/linux/pci_regs.h | 3 ++ >> 6 files changed, 195 insertions(+), 2 deletions(-) >> >> -- >> 2.34.1 >>