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AJvYcCWakojoWshwBr3b/YN7DL219NA67ROzf/MnwM4Bgx9ZOvajhP8zaEJWPrhS6ZGlQlgbYAzWhdtZYOY7XpXGD/mpdoixEPYUthQIpfFdQ0HV6ZnEuU7JPnsC5aa5ZZnqyNQdetWP6ZiAt1OZptEBBrC0ft9eHNW3kXHg5eOxrG2OoVscOA== X-Gm-Message-State: AOJu0YxXiVGBx1pWaerZM9dH49QIiaOOqAX56WCfHd5Oj4MZusZIoXLl FBULkB2PYnypT8Uj4Qd2aMdZbqtuUDQmKNYZRv7nS8LCiMNJpkQ= X-Received: by 2002:ac2:5388:0:b0:51a:e305:eb20 with SMTP id 2adb3069b0e04-5217c567012mr4863974e87.17.1715256443303; Thu, 09 May 2024 05:07:23 -0700 (PDT) Received: from U4.lan ([2a02:810b:f40:4600:b44:d8c3:6fa8:c46f]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-41fccce1912sm24112005e9.11.2024.05.09.05.07.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 May 2024 05:07:23 -0700 (PDT) From: Alex Bee To: Sandy Huang , =?UTF-8?q?Heiko=20St=C3=BCbner?= , Andy Yan , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Alex Bee , Conor Dooley Subject: [PATCH v2 2/7] dt-bindings: clock: rk3128: Add PCLK_MIPIPHY Date: Thu, 9 May 2024 14:07:10 +0200 Message-ID: <20240509120715.86694-3-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240509120715.86694-1-knaerzche@gmail.com> References: <20240509120715.86694-1-knaerzche@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The DPHY's APB clock is required to be exposed in order to be able to enable it and access the phy's registers. Signed-off-by: Alex Bee Acked-by: Conor Dooley --- changes since v1: - none include/dt-bindings/clock/rk3128-cru.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/rk3128-cru.h b/include/dt-bindings/clock/rk3128-cru.h index 6a47825dac5d..1be455ba4985 100644 --- a/include/dt-bindings/clock/rk3128-cru.h +++ b/include/dt-bindings/clock/rk3128-cru.h @@ -116,6 +116,7 @@ #define PCLK_GMAC 367 #define PCLK_PMU_PRE 368 #define PCLK_SIM_CARD 369 +#define PCLK_MIPIPHY 370 /* hclk gates */ #define HCLK_SPDIF 440 -- 2.43.2