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AJvYcCUVtdlpU82s1EMWM/zfwPZMP84ucTP7sCY8NqjP7oqZAfYiH6LkwhGKsVY5QXIENPAcNn9caPFdoLMUmu5HknaPdXQmD+EcTnc5Nxh2lZ+HE9Be/uP1iwRLkWyVinQ7wrbMezQSJQuohg== X-Gm-Message-State: AOJu0YyuTIkyckDGugQ7s7+uxjM8BDuSL+cMYwYtwJalkLlF37MlIkTv 5MdU+b5SmZc+eSvgeERWkv5XgQe9k2M6g9IBCYDVXYey3jghLy9wzoXrI58jLJETji7rMRbtEdE MrQee35SvrpebSQqgtVOCjbv6Bd0= X-Received: by 2002:a2e:2416:0:b0:2de:8697:e08b with SMTP id 38308e7fff4ca-2e447084518mr49281291fa.26.1715264236601; Thu, 09 May 2024 07:17:16 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <1715231698-451-1-git-send-email-shengjiu.wang@nxp.com> <1715231698-451-2-git-send-email-shengjiu.wang@nxp.com> In-Reply-To: <1715231698-451-2-git-send-email-shengjiu.wang@nxp.com> From: Daniel Baluta Date: Thu, 9 May 2024 17:17:04 +0300 Message-ID: Subject: Re: [PATCH 1/2] arm64: dts: imx8mp: Initialize audio PLLs from audiomix subsystem To: Shengjiu Wang Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, shengjiu.wang@gmail.com, Daniel Baluta Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, May 9, 2024 at 8:36=E2=80=AFAM Shengjiu Wang wrote: > > Initialize audio PLL1 as the parent clock for 8kHz series rates, > audio PLL2 as the parent clock for 11kHz series rates. that PLL1 > and PLL2 can together support full range of audio sample rates. > > Signed-off-by: Shengjiu Wang Reviewed-by: Daniel Baluta