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Date: Thu, 9 May 2024 18:24:24 +0100
From: Conor Dooley <conor@kernel.org>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: "paulburton@kernel.org" <paulburton@kernel.org>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 4/5] dt-bindings: mips: Document mti,mips-cm
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On Wed, May 08, 2024 at 09:28:27PM +0100, Jiaxun Yang wrote:
>=20
>=20
> =E5=9C=A8 2024/5/8 18:01, Conor Dooley =E5=86=99=E9=81=93:
> [...]
> > > So it's actually a register block that can be remapped to anywhere in
> > > MMIO address space. DeviceTree usually passes firmware's mapping loca=
tion
> > > to kernel.
> > >=20
> > > There are some other similar bindings like mti,mips-cdmm and mti,mips=
-cpc,
> > > I just copied phraseology from them, should I try to explain it more =
here?
> > The description that you've given here is of something that sounded
> > awfully like mapping into a location in DDR etc, is it actually being
> > mapped into a non-memory address?
> It is an overlay being realized at CPU core level so it can be mapped at =
any
> where, but the firmware convention is to map it to a "non-memory address".

In that case, a description that even eejits like my can understand
sounds like all you need to understand :)

Thanks,
Conor.

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Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZj0GxwAKCRB4tDGHoIJi
0kqyAP0fDiEStQ6JcYJzsw962RPlPtomFrmdBAU9SQAQGiR65wD/UnGLN9Qa1HT7
sLegR6jS7JDKrIjxkTK2Bk1uWH0miAo=
=Y91o
-----END PGP SIGNATURE-----

--MugsB6SaPrl37OTd--