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Message-ID: <d1d8380a-4f28-4f65-8734-073bb4b0b359@broadcom.com>
Date: Thu, 9 May 2024 14:38:24 -0700
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Subject: Re: [PATCH v4 3/4] mips: bmips: setup: make CBR address configurable
To: Christian Marangi <ansuelsmth@gmail.com>,
 Hauke Mehrtens <hauke@hauke-m.de>, =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?=
 <zajec5@gmail.com>, Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
 Rob Herring <robh@kernel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
 Conor Dooley <conor+dt@kernel.org>,
 Broadcom internal kernel review list
 <bcm-kernel-feedback-list@broadcom.com>, linux-mips@vger.kernel.org,
 devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
References: <20240509204750.1538-1-ansuelsmth@gmail.com>
 <20240509204750.1538-4-ansuelsmth@gmail.com>
From: Florian Fainelli <florian.fainelli@broadcom.com>
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In-Reply-To: <20240509204750.1538-4-ansuelsmth@gmail.com>
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	boundary="000000000000553cb406180c3df4"

--000000000000553cb406180c3df4
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On 5/9/24 13:47, Christian Marangi wrote:
> Add support to provide CBR address from DT to handle broken
> SoC/Bootloader that doesn't correctly init it. This permits to use the
> RAC flush even in these condition.
> 
> To provide a CBR address from DT, the property "brcm,bmips-cbr-reg"
> needs to be set in the "cpus" node. On DT init, this property presence
> will be checked and will set the bmips_cbr_addr value accordingly. Also
> bmips_rac_flush_disable will be set to false as RAC flush can be
> correctly supported.
> 
> The CBR address from DT will overwrite the cached one and the
> one set in the CBR register will be ignored.
> 
> Also the DT CBR address is validated on being outside DRAM window.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>

Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
-- 
Florian


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