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Message-ID: <282a3696-e883-49bb-9bb5-57d4762250cf@antgroup.com>
Date: Fri, 10 May 2024 10:18:35 +0800
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Subject: Re: [PATCH v2 3/5] riscv: Add update_mmu_tlb_range()
To: Alexandre Ghiti <alex@ghiti.fr>, akpm@linux-foundation.org,
 chenhuacai@kernel.org, tsbogend@alpha.franken.de, paul.walmsley@sifive.com,
 palmer@dabbelt.com, chris@zankel.net, jcmvbkbc@gmail.com
Cc: linux-kernel@vger.kernel.org, linux-mm@kvack.org,
 loongarch@lists.linux.dev, linux-riscv@lists.infradead.org,
 david@redhat.com, ryan.roberts@arm.com, ioworker0@gmail.com,
 libang.linux@gmail.com
References: <20240506155120.83105-1-libang.li@antgroup.com>
 <20240506155120.83105-4-libang.li@antgroup.com>
 <5a812c84-c3bb-4874-b29c-0816494b77a8@ghiti.fr>
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From: "Bang Li" <libang.li@antgroup.com>
In-Reply-To: <5a812c84-c3bb-4874-b29c-0816494b77a8@ghiti.fr>
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Thanks, Alex!

On 2024/5/7 13:35, Alexandre Ghiti wrote:
> Hi Bang,
> 
> On 06/05/2024 17:51, Bang Li wrote:
>> Added update_mmu_tlb_range function, we can batch update tlb of an
>> address range.
>>
>> Signed-off-by: Bang Li <libang.li@antgroup.com>
>> ---
>>   arch/riscv/include/asm/pgtable.h | 4 ++++
>>   1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/riscv/include/asm/pgtable.h 
>> b/arch/riscv/include/asm/pgtable.h
>> index 661b2b4fe758..f784c6dd2c66 100644
>> --- a/arch/riscv/include/asm/pgtable.h
>> +++ b/arch/riscv/include/asm/pgtable.h
>> @@ -489,6 +489,10 @@ static inline void update_mmu_cache_range(struct 
>> vm_fault *vmf,
>>   #define __HAVE_ARCH_UPDATE_MMU_TLB
>>   #define update_mmu_tlb update_mmu_cache
>> +#define __HAVE_ARCH_UPDATE_MMU_TLB_RANGE
>> +#define update_mmu_tlb_range(vma, addr, ptep, nr) \
>> +    update_mmu_cache_range(NULL, vma, addr, ptep, nr)
>> +
>>   static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
>>           unsigned long address, pmd_t *pmdp)
>>   {
> 
> 
> You can add:
> 
> Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
> 
> Thanks,
> 
> Alex