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Fri, 10 May 2024 19:05:30 +0800 Received: from mszsdhlt06.gcn.mediatek.inc (10.16.6.206) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 10 May 2024 19:05:29 +0800 From: Liankun Yang To: , , , , , , , , , , , , , , , , , , CC: , , , , , Subject: [PATCH v2 0/2] Add PHY-dp bindings Date: Fri, 10 May 2024 19:04:13 +0800 Message-ID: <20240510110523.12524-1-liankun.yang@mediatek.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-MTK: N Update write DP phyd register and add phy-dp bindings. Liankun Yang (2): Add write DP phyd register from parse dts Add dp PHY dt-bindings .../display/mediatek/mediatek.phy-dp.yaml | 45 +++++++++++++++++++ drivers/phy/mediatek/phy-mtk-dp.c | 37 +++++++++++++++ 2 files changed, 82 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek.phy-dp.yaml -- 2.18.0