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If this pin is not > > > > connected, it only supports setting the mode manually. > > > > > > > > Add USB phy bindings for Sophgo CV18XX/SG200X series SoC. > > > > > > ... > > > > > > > + > > > > + clock-names: > > > > + items: > > > > + - const: phy > > > > + - const: app > > > > + - const: stb > > > > + - const: lpm > > > > + > > > > + vbus_det-gpios: > > > > > > No underscores. > > > > > > > Thanks. > > > > > > + description: GPIO to the USB OTG VBUS detect pin. This should not be > > > > + defined if vbus_det pin and switch pin are connected, which may > > > > + break the VBUS detection. > > > > > > Why is this property of the PHY? VBUS pin goes to the connector, doesn't > > > it? It looks like you combined two or three (!!!) bindings into one. > > > > > > > Yes, but I am not sure which is the best to write this bindings. > > The topology of USB likes this: > > > > controller -- phy -- switch --> (host) port/hub > > --> (device) port > > > > The vbus-detect connect to the device port, but it will change the mode for > > both phy and switch. And the switch is just a switching circuit. > > I am pretty confused on how to split this binding. I think it may like the > > following: > > > > phy { > > switch { > > /* This is the switch in the follows */ > > connector1 { > > /* host port */ > > }; > > connector2 { > > /* device port*/ > > /* the vbus pin is here */ > > }; > > }; > > }; > > > > Could you share some suggestion on this? > > Something like the above assuming 2 physical connectors, but probably > should be a child of the USB controller or on its own. PHYs usually > aren't put into a parent/child hierarchy, but are out of band. > Yes, your are right. I should add port definition under the controller. > Is this switch implemented on the board level? If so, you should create > something that would work on any platform with a GPIO controlled USB > switch like this. > > Rob Yes, the switch is FSUSB30UMX. If I understand you correctly, I need to add a driver to control this switch, right? Regards, Inochi